GB2358959A - Metamorphic heterojunction bipolar transistor for low cost fabrication on large size gallium arsenide wafers - Google Patents
Metamorphic heterojunction bipolar transistor for low cost fabrication on large size gallium arsenide wafers Download PDFInfo
- Publication number
- GB2358959A GB2358959A GB0020938A GB0020938A GB2358959A GB 2358959 A GB2358959 A GB 2358959A GB 0020938 A GB0020938 A GB 0020938A GB 0020938 A GB0020938 A GB 0020938A GB 2358959 A GB2358959 A GB 2358959A
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- Prior art keywords
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- inp
- ohmic contact
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- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 title claims abstract description 27
- 229910001218 Gallium arsenide Inorganic materials 0.000 title claims abstract description 25
- 235000012431 wafers Nutrition 0.000 title claims abstract description 17
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 13
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims abstract description 21
- 239000000758 substrate Substances 0.000 claims abstract description 19
- 239000000463 material Substances 0.000 claims abstract description 18
- BCQMBFHBDZVHKU-UHFFFAOYSA-N terbumeton Chemical compound CCNC1=NC(NC(C)(C)C)=NC(OC)=N1 BCQMBFHBDZVHKU-UHFFFAOYSA-N 0.000 claims description 4
- 229910052738 indium Inorganic materials 0.000 abstract description 3
- 230000008901 benefit Effects 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 6
- 238000012545 processing Methods 0.000 description 4
- 230000001413 cellular effect Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 230000037230 mobility Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000000979 retarding effect Effects 0.000 description 1
- 238000012552 review Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 239000013585 weight reducing agent Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/737—Hetero-junction transistors
- H01L29/7371—Vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/737—Hetero-junction transistors
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Bipolar Transistors (AREA)
Abstract
A metamorphic heterojunction bipolar transistor having a material structure for low cost fabrication on large size gallium arsenide wafers comprises a semi-insulating GaAs substrate 20; an undoped AlGaAsSb (or AlInGaAs) metamorphic buffer layer 21; a heavily doped n-type InGaAs layer 22, forming an ohmic contact for the collector of the MHBT; a lightly doped n-type InGaAs or InP or InAlAs layer 23, forming the collector of the MHBT; a heavily doped p-type InGaAs layer 24, forming the base and an ohmic contact for the base of the MHBT; an n-type InAlAs (or graded AlInGaAs or InP) layer 25, forming the emitter of the MHBT; and a heavily doped n-type InGaAs layer, forming an ohmic contact for the emitter of the MHBT. Such material structure makes high-indium content MHBTs feasible to be fabricated on large size gallium arsenide wafers with diameters of six inches or larger, resulting in lower manufacturing cost, higher power, and higher efficiency at a very low operation voltage.
Description
2358959 New Metamorphic Heterojunction Bipolar Transistor Having Material
Structure for Low Cost Fabrication on Large Size Gallium Arsenide Wafers
FIELD OF THE INVENTION
The present invention generally relates to a metamorphic heterojunction bipolar transistor (to be abbreviated as here below), and more particularly, to an T having a material structure for low cost fabrication on large size gallium arsenide (GaAs) wafers.
BACKGROUND OF THE INVENTION
Recently, there has been increasing interest in developing high performance transistor-based amplifiers which are essential for both military and commercial applications in digital computers, telecommunication systems, and advanced electronic systems as they can handle signals at high frequencies. These ampl ifiers have the potential for low cost, high. gain, low noise, and high efficiency operation with reliability superior to that of MATTs and TWTAs.
Heterojunction bipolar transistor (HBT), as the term suggests, has a heterojunction formed between semiconductors of different compositions and band-gaps. The use of a wide band-gap emitter and a low band-gap base provides band offset at the hetero-interface that favors electron injection, in an N-p-n transistor, into the base while retarding hole injection into the emitter. It also provides benefits for high-speed operation because the electrons that surmount the energy barrier are injected into the base with high forward velocities, reduemig base transit time.
Accordingly, GaAs HBTs, based on A1GaAs (or InGaP)/Ga.As material structure, have gained a wide acceptance especially for cellular phone power amplifier (PA) applications, as they exhibit advantages of high frequency, high linearity, and small die size, and only one power supply is required. The high turn-on voltage of GaAs JABTs, however, practically limits the operation of the devices in the range of 3.0 to 3. 6V in the cellular phones now in use.
1 The trend in mobile communication is to reach a system level solution that will support a single cell L] battery design of 1.2 to 1.5V (down ftom 3.6V). This is due to size and weight reduction of the battery pack, which accounts for approximately 60% of the total weight of a wireless handset.
The InP HBT is, on the- contrary, is an ideal candidate for 1.5V operation, since it has a lower turn on voltage, and also offers higher gain and higher efficiency than the GaAs HBT due to its intrinsic advantages of higher mobilities, faster non-equilibrium transport velocities and lower surface recombination.
The InP HBT, based on InAlAs (or graded AlInGaAs)/InGaAs heterojunction material structure, has been fabricated on an InP substrate. Please refer to FIG. 1, which is a schematic cross-sectional view illustrating an example of material structure an InP-based HBT in the prior art. As can be seen in the drawing, the epitaxially grown material structure comprises a semi-insulating InP substrate 10; a heavily doped n-type InGaAs layer 12, forinffig an ohmic contact for the collector of said InP-based HBT; a lightly doped n-type InGaAs layer 13, forming the collector of said InPbased BBT; a heavily doped p-type InGaAs layer 14, forming the base and an ohmic contact for the base of said InP-based HBT; an n-type hLAdAs (or graded AlInGa.As) layer 15, forming the emitter of said InP-based HBT; and a heavily doped n-type InGaAs layer 16, forming an ohmic contact for the emitter of said InP-based HBT.
Therefore, the InP-based HBT has advantages of providing higher maximum frequency of operation and cutoff frequency for significantly lower noise figure, higher gain and better efficiency. This is due to the fact that the InP-based HBT has high indium. content and thus has higher electron velocity, current density, and transconductance. Although InP HBTs are very attractive for low voltage and high efficiency operation especially in use in the PAs of the cellular phones, they are, however, difficult to process (primarily due to the InP substrate). Furthermore, the InP wafer is very fragile, costly (about 10 times of GaAs) and presently limited to only 3- in. in size. On the contrary, the processing technology for GaAs HBTs has higher yield and lower cost (presently 40% less), if 6-in. wafers are used.
Accordingly, there is a need for a new device with both high 2 1 efficiency, low voltage operation and low manufacturing cost.
SUMMARY OF THE INVENTION
It is therefore a main object of the present invention to provide a new metamorphic heterojunction bipolar transistor having material structure with high efficiency, low voltage operation.
It is another object of the present invention to provide a new metamorphic heterojunction bipolar transistor having matenial structure with low manufacturing cost.
In order to accomplish the foregoing objects, the present invention io provides a metamorphic heterejunction bipolar trwsistor (NU-IBT), having a material structure for low cost fabrication on large size gallium arsenidlel (GaAs) wafers, comprising: a semi-insulating GaAs substrate; an undoped metamorphic buffer layer, such as A1Ga.AsSb or AlInGaAs buffer; a heavily doped n-type InGaAs layer, forming an ohmic contact for the collector of said MHBT; a lightly doped n-type InGaAs layer or InP or InAlAs layer, forming the collector of said MHBT; a heavily doped p-type InGaAs layer, ffirming the base and an ohmic contact for the base of said NMT; an n-type InAlAs layer or graded AlInGa.As or InP layer, forming the emitter of said NWT; and a heavily doped n-type InGaM layer, forming an ohmic contact for the emitter of said MEBT.
It is preferable that said material structure is epitaxially grown on large size GaAs wafers with diameters of six inches or larger.
BRIEF DESCRIPTION OF THE DRAWINGS
The object, features and advantages of the present invention will be readily understood from the following descriptions of the preferred embodiment with reference to the drawings, in which:
FIG- 1 is a schematic cross-sectional view illustrating an example of material structure of an InP-based HBT in the prior art.
FIG. 2 is a schematic cross-sectional view illustrating an example of material structure of an NMT in accordance with the preferred embodiment of the present invention.
3 Table 1 shows the comparisons of present power transistor technologies for wireless handsets.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
Please refer to FIG. 2, which is a schematic cross-sectional view illustrating an example of material structure of an MEBT in accordance with the preferred embodiment of the present invention. As shown in the drawing, the epitaxially grown material structure comprises: a semi insulating GaAs substrate 20; an undoped metamophic buffer layer, such as A1GaAsSb or AlInGaAs buffer layer 21; a heavily doped n-type InGaAs io layer 22, forming an ohmic contact for the collector of said MIMT; a lightly doped n-type InGa-As or InP or InAlAs layer 23, forming the collector of said MHBT; a heavily doped p-type InGaAs layer 24, forming the base and an ohmic contact for the base of said T; an n-type ls (or graded AfinGaAs or InP) layer 25, forming the emitter of said NMT; and a heavily doped n-type InGaAs layer 26, forming an ohmic contact for the enfitter of said NMT.
It is notable that the NMT material structure featuring a buffer layer 21 sandwiched between the substrate 20 and the collector contact layer 22 This allows the T to employ the InP-based HBT active structure 22-26 on a GaAs substrate20, since the buffer layer 21 makes a lattice constant transition between the GaAs substrate 20 and high-indium epitaxially grown layers 22-26 lattice-matched to InP 10.
Therefore, the NMT has the InP-based HBT performance but with the GaAs wafer 20 processing cost. Particularly, the use of a GaAs substrate in UMBT allows a production of very high performance devices/NMCs with very low substrate and wafer processing cost. The chip cost of NMTs can be further reduced when a larger size GaAs wafer, for instance 6-in. is used. It is notable that 6-in. GaAs wafers are available, but only 3-Mi. InP wafers are available. The lattice constant shifting buffer growth technology needed in the NMT is currently commercially available (e.g. epi houses such as IQE mi U.S.A. and Picogiga in France).
The metamorphic technology also allows a wider range of AI and In 4 1 compositions in the material structure, providing an excellent potential for even higher performance, such as higher breakdown and efficiency, than that of the conventional MP-based H13T.
To sum up, let us review the previously disclosed arts and the present invention, we will find, Mi Table 1, that the advantages of the new MIffiT include:
(1) ten times lower substrate cost of the same size, (2) less fragile substrate for improved fine yield, (3) easy to process backside of the wafer, translating to 40% Cost savings in processmig, (4) larger wafer size available for very low cost chip production.
Although the present invention has been disclosed and illustrated with reference to the preferred embodiments, the principles involved are susceptible for use mi numerous other embodiments that will be apparent to persons skilled in the art such that modification s and changes may be made to the present invention without departing from the spirit and scope thereof. This invention is, therefore, to be determined not with reference to th.e above descniption but with reference to the appended claims along With their full scope of equivalents.
1 Table 1 Comparisons of power transistor technologies for wireless handsets Transistor Key Elements Remarks Technology GaAs HBT A1GaAs(or InGaP)/ Good reliability, matur-1, InGaAs heterojunetion technoloRv GaAs substrate Low cost Production ready InP HBT AlInAs(or graded Difficult to process AlInGaAs or InP)/ High substrate and InGaAs/ (or InP processinc, cost or InAlAs) Limited substrate size Hereojunction available InP substrate Not suitable for manufacturing, lvMT AlInAs(or graded GaAs-like processing AlInGaAs or In-P)/ 6" substrates available InGaAs(or InP Low cost, suitable for orInAlAs) manufacturinc, /A1GaAsSb(or Flexibility of Layer AlInGa,As) compositions provides Heterojunction even hi2her Lattice constant breakdown shifting buffer and efficiency than GaAs substrate conventional InP HBTs!! -7
Claims (4)
- CLAIMI.A metamorphic heterojunction bipolar transistor (1vWT.) having a material structure for low cost fabrication on large size gallium arsenide (GaAs) wafers with six inches or larger, comprising:a senn-insulating GaAs substrate; an undoped metamorphic buffer layer; a heavily doped n-type InGaAs layer, forming an ohmic contact for the collector of said NSIBT; a lightly doped n-type layer forming the collector of said NM T, io wherein the lightly doped n-type layer is In GaAs or InP or InALAS; a heavily doped p-type InGaAs layer, forming the base ancl an ohmic contact for the base of said NMT; a layer forming the emitter of said NMT, wherein the layer is an Ti type.hiA]As layer, or an graded n-type AlInGa.As layer, or an n-type InP layer; and a heavily4oped n-type InGaAs layer, forming an ohmic contact. for the emitter of said Nfi-IBT.
- 2.The M1IBT as recited in claim 1, wherein said undoped metamorphic bufFer layer is A1GraAsSb bufFer layer.
- 3.The MEBT as recited 'm claim 1, wherein said undoped metamorphic bufFer layer is AlInClaAs buffer layer.
- 4.The MEBT as described herein with reference to the drawings.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15802699P | 1999-10-07 | 1999-10-07 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB0020938D0 GB0020938D0 (en) | 2000-10-11 |
| GB2358959A true GB2358959A (en) | 2001-08-08 |
| GB2358959B GB2358959B (en) | 2002-01-16 |
Family
ID=22566406
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB0020938A Expired - Fee Related GB2358959B (en) | 1999-10-07 | 2000-08-24 | Metamorphic heterojunction bipolar transistor having material structure for low cost fabrication on large size gallium arsenide wafers |
Country Status (7)
| Country | Link |
|---|---|
| JP (1) | JP2001144101A (en) |
| KR (1) | KR100400486B1 (en) |
| CN (1) | CN1296291A (en) |
| CA (1) | CA2322080A1 (en) |
| DE (1) | DE10049148A1 (en) |
| FR (1) | FR2799884A1 (en) |
| GB (1) | GB2358959B (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7122734B2 (en) * | 2002-10-23 | 2006-10-17 | The Boeing Company | Isoelectronic surfactant suppression of threading dislocations in metamorphic epitaxial layers |
| RU2474924C1 (en) * | 2011-08-08 | 2013-02-10 | Учреждение Российской академии наук Институт сверхвысокочастотной полупроводниковой электроники РАН (ИСВЧПЭ РАН) | Semiconductor nanoheterostructure inalas/ingaas with metac metamorphic buffer |
| RU2474923C1 (en) * | 2011-06-23 | 2013-02-10 | Учреждение Российской академии наук Институт сверхвысокочастотной полупроводниковой электроники РАН (ИСВЧПЭ РАН) | SEMICONDUCTOR METAMORPHIC NANOHETEROSTRUCTURE InAlAs/InGaAs |
| CN110970340A (en) * | 2019-10-31 | 2020-04-07 | 中国电子科技集团公司第五十五研究所 | Flexible InP HBT device and preparation method thereof |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006210452A (en) * | 2005-01-26 | 2006-08-10 | Sony Corp | Semiconductor apparatus |
| CN100452303C (en) * | 2005-05-24 | 2009-01-14 | 中国科学院微电子研究所 | Metal alloy system suitable for ohmic contact of high-speed gallium arsenide-based device |
| CN102651417B (en) * | 2012-05-18 | 2014-09-03 | 中国科学院苏州纳米技术与纳米仿生研究所 | Three-knot cascading solar battery and preparation method thereof |
| US20170084771A1 (en) * | 2015-09-21 | 2017-03-23 | The Boeing Company | Antimonide-based high bandgap tunnel junction for semiconductor devices |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0624907A2 (en) * | 1993-05-10 | 1994-11-17 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device, heterojunction bipolar transistor, and high electron mobility transistor |
| US5412233A (en) * | 1992-06-17 | 1995-05-02 | France Telecom | Heterojunction bipolar transistor |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0432220A (en) * | 1990-05-28 | 1992-02-04 | Mitsubishi Electric Corp | Structure of semiconductor buffer layer |
| JPH0590283A (en) * | 1991-09-30 | 1993-04-09 | Nec Corp | Semiconductor device |
| US5404028A (en) * | 1993-01-22 | 1995-04-04 | Hughes Aircraft Company | Electrical junction device with lightly doped buffer region to precisely locate a p-n junction |
| US5631477A (en) * | 1995-06-02 | 1997-05-20 | Trw Inc. | Quaternary collector InAlAs-InGaAlAs heterojunction bipolar transistor |
| KR100243409B1 (en) * | 1996-12-12 | 2000-02-01 | 이계철 | Method for forming epi-layer of pnp/npn compound semiconductor hbt on the same plane |
| JP2000150529A (en) * | 1998-11-06 | 2000-05-30 | Furukawa Electric Co Ltd:The | Epitaxial wafer for hetero junction bi-polar transistor |
| JP2000223498A (en) * | 1999-01-28 | 2000-08-11 | Sharp Corp | Fabrication of semiconductor device and heterojunction bipolar transistor, and amplifier |
-
2000
- 2000-08-24 GB GB0020938A patent/GB2358959B/en not_active Expired - Fee Related
- 2000-09-04 CN CN00124312A patent/CN1296291A/en active Pending
- 2000-09-26 JP JP2000292682A patent/JP2001144101A/en active Pending
- 2000-10-03 CA CA002322080A patent/CA2322080A1/en not_active Abandoned
- 2000-10-04 DE DE10049148A patent/DE10049148A1/en not_active Withdrawn
- 2000-10-05 KR KR10-2000-0058495A patent/KR100400486B1/en not_active IP Right Cessation
- 2000-10-06 FR FR0012813A patent/FR2799884A1/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5412233A (en) * | 1992-06-17 | 1995-05-02 | France Telecom | Heterojunction bipolar transistor |
| EP0624907A2 (en) * | 1993-05-10 | 1994-11-17 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device, heterojunction bipolar transistor, and high electron mobility transistor |
Non-Patent Citations (1)
| Title |
|---|
| Applied Physics Letters, vol 77, no 6, pages 869-871 * |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7122734B2 (en) * | 2002-10-23 | 2006-10-17 | The Boeing Company | Isoelectronic surfactant suppression of threading dislocations in metamorphic epitaxial layers |
| US7626116B2 (en) | 2002-10-23 | 2009-12-01 | The Boeing Company | Isoelectronic surfactant suppression of threading dislocations in metamorphic epitaxial layers |
| RU2474923C1 (en) * | 2011-06-23 | 2013-02-10 | Учреждение Российской академии наук Институт сверхвысокочастотной полупроводниковой электроники РАН (ИСВЧПЭ РАН) | SEMICONDUCTOR METAMORPHIC NANOHETEROSTRUCTURE InAlAs/InGaAs |
| RU2474924C1 (en) * | 2011-08-08 | 2013-02-10 | Учреждение Российской академии наук Институт сверхвысокочастотной полупроводниковой электроники РАН (ИСВЧПЭ РАН) | Semiconductor nanoheterostructure inalas/ingaas with metac metamorphic buffer |
| CN110970340A (en) * | 2019-10-31 | 2020-04-07 | 中国电子科技集团公司第五十五研究所 | Flexible InP HBT device and preparation method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| KR100400486B1 (en) | 2003-10-01 |
| CN1296291A (en) | 2001-05-23 |
| GB0020938D0 (en) | 2000-10-11 |
| GB2358959B (en) | 2002-01-16 |
| FR2799884A1 (en) | 2001-04-20 |
| CA2322080A1 (en) | 2001-04-07 |
| KR20010050866A (en) | 2001-06-25 |
| JP2001144101A (en) | 2001-05-25 |
| DE10049148A1 (en) | 2001-04-19 |
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| Date | Code | Title | Description |
|---|---|---|---|
| PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20150824 |