GB2313708A - Etching aluminium alloy and titanium nitride multilayer films - Google Patents
Etching aluminium alloy and titanium nitride multilayer films Download PDFInfo
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- GB2313708A GB2313708A GB9711309A GB9711309A GB2313708A GB 2313708 A GB2313708 A GB 2313708A GB 9711309 A GB9711309 A GB 9711309A GB 9711309 A GB9711309 A GB 9711309A GB 2313708 A GB2313708 A GB 2313708A
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- film
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- titanium nitride
- etched
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- 238000005530 etching Methods 0.000 title claims abstract description 83
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 title claims abstract description 48
- 229910000838 Al alloy Inorganic materials 0.000 title claims abstract description 14
- 239000007789 gas Substances 0.000 claims abstract description 96
- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 claims abstract description 39
- 238000000034 method Methods 0.000 claims abstract description 27
- 239000000203 mixture Substances 0.000 claims abstract description 26
- 239000004065 semiconductor Substances 0.000 claims abstract description 20
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 claims abstract description 10
- 239000000460 chlorine Substances 0.000 claims abstract description 9
- 229910052801 chlorine Inorganic materials 0.000 claims abstract description 9
- 238000004519 manufacturing process Methods 0.000 claims abstract description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 48
- 235000012239 silicon dioxide Nutrition 0.000 claims description 24
- 239000000377 silicon dioxide Substances 0.000 claims description 24
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 14
- 229910001873 dinitrogen Inorganic materials 0.000 claims description 10
- 238000001020 plasma etching Methods 0.000 claims description 10
- 239000000758 substrate Substances 0.000 claims description 8
- 238000000059 patterning Methods 0.000 claims description 5
- 229910052757 nitrogen Inorganic materials 0.000 claims description 2
- KZBUYRJDOAKODT-UHFFFAOYSA-N Chlorine Chemical compound ClCl KZBUYRJDOAKODT-UHFFFAOYSA-N 0.000 description 31
- 229910018594 Si-Cu Inorganic materials 0.000 description 25
- 229910008465 Si—Cu Inorganic materials 0.000 description 25
- 229910045601 alloy Inorganic materials 0.000 description 23
- 239000000956 alloy Substances 0.000 description 23
- 229920002120 photoresistant polymer Polymers 0.000 description 15
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 10
- 229910052782 aluminium Inorganic materials 0.000 description 10
- 230000003746 surface roughness Effects 0.000 description 9
- 230000004888 barrier function Effects 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000007796 conventional method Methods 0.000 description 4
- 230000003647 oxidation Effects 0.000 description 4
- 238000007254 oxidation reaction Methods 0.000 description 4
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 4
- 238000004544 sputter deposition Methods 0.000 description 4
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 3
- 239000010936 titanium Substances 0.000 description 3
- 229910018125 Al-Si Inorganic materials 0.000 description 2
- 229910018520 Al—Si Inorganic materials 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- VSCWAEJMTAWNJL-UHFFFAOYSA-K aluminium trichloride Chemical compound Cl[Al](Cl)Cl VSCWAEJMTAWNJL-UHFFFAOYSA-K 0.000 description 2
- 238000004380 ashing Methods 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 229910003910 SiCl4 Inorganic materials 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000007795 chemical reaction product Substances 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000004615 ingredient Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 238000011089 mechanical engineering Methods 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000000047 product Substances 0.000 description 1
- FDNAPBUWERUEDA-UHFFFAOYSA-N silicon tetrachloride Chemical compound Cl[Si](Cl)(Cl)Cl FDNAPBUWERUEDA-UHFFFAOYSA-N 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
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- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Chemical & Material Sciences (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Drying Of Semiconductors (AREA)
Abstract
A method of fabricating a semiconductor device is characterized in that a mixture gas including chlorine (C1 2 ) gas and boron trichloride (BC1 3 ) gas is employed as an etching gas when a multi-layered film including an aluminum alloy film (3-1Aa) and a titanium nitride film (8a) is etched. The volume ratio of the BC1* small Greek omega * gas to both of the C1* small Greek eta * and BC1* small Greek omega * gases is set to be equal to or greater than 15%. The method can prevent irregularities from being generated on a surface of the titanium nitride film when etched, which in turn can prevent generation of etching residues which may occur due to such irregularities, thereby reducing the probability of a shortcircuit between wiring layers.
Description
METHOD OF FABRICATING SEMICONDUCTOR DEVICE
BACKGROUND OF THE INVENTION
FIELD OF THE INVENTION
The invention relates to a method of fabricating a semiconductor device, and more particularly to such a method having a step of patterning a multi-layered film including an aluminum alloy film and a titanium nitride film by plasma etching to thereby form a wiring layer.
DESCRIPTION OF THE RELATED ART
With higher integration in a semiconductor device, a process of forming a wiring in smaller size and with higher accuracy has been in greater demand. In a typical, conventional method of etching for formation of an aluminum wiring layer, there has been used a photoresist film as an etching mask. However, since a photoresist film has an insufficient selection ratio to aluminum (All Photoresist selection ratio) in terms of an etching rate, etching with high accuracy has become difficult by the conventional method with a wiring having been formed in smaller size.
Thus, Japanese Unexamined Patent Publication No. 7-183298 has suggested an etching method in which a silicon dioxide film is employed as an etching mask. The use of a silicon dioxide film as an etching mask makes it possible to have a greater selection ratio of silicon dioxide to aluminum (Al/SiO2 selection ratio) than a selection ratio of photoresist to aluminum (All Photoresist selection ratio). As a result, it would be possible to form a wiring in smaller size and with higher accuracy, according to the Publication. In the suggested etching method, only a chlorine gas is employed as an etching gas.
However, the above mentioned etching method has a problem as follows. If only a chlorine gas is employed for etching, it is quite difficult to control a shape of etched films, and hence there often occurs side-etching at a sidewall of a wiring layer.
Hereinbelow the etching method is detailed with reference to Figs. IA and 1B. Fig. 1A illustrates films formed on a substrate prior to carrying out etching. As illustrated in Fig. 1A, an insulating film 2 is formed by thermal oxidation by a 500 nm thickness on a silicon substrate 1. On the insulating film 2 is formed an Al-Si-Cu alloy film 3 by a 900 nm thickness by sputtering. The Al
Si-Cu alloy film will make a wiring layer later. There is further formed a patterned silicon dioxide film 4 by a 300 nm thickness on the Al-Si-Cu alloy film 3. The patterned silicon dioxide film 4 will act as an etching mask when the Al
Si-Cu alloy film 3 is etched.
Fig. 1B illustrates the films having been etched employing only chlorine gas as an etching gas. As illustrated, a wiring layer 3a constituted of the
Al-Si-Cu alloy film 3 is side-etched as indicated with a reference numeral 5. This is because aluminum readily reacts with chlorine, and aluminum chloride as reaction product has high volatility. When a photoresist film is used as an etching mask, product produced by decomposition of photoresist adheres again to a sidewall of an aluminum film having been etched to thereby act as a protection film for preventing side-etching. In contrast, when a silicon dioxide film is used as an etching mask, any protection film such as the above mentioned one is not produced, resulting in intensive side-etching. Such intensive side-etching would significantly reduce reliability of a wiring layer.
In addition, when a wiring layer is to be formed of a multi-layered film comprising an aluminum alloy film and a titanium nitride film, there is caused a problem that etching residues are generated by etching the titanium nitride film in combination with aluminum employing chlorine gas only. The detail is explained hereinbelow with reference to Figs. 2A to 2D.
Fig. 2A illustrates films deposited on a substrate prior to etching. As illustrated, an insulating film 2 is formed by thermal oxidation by a 500 nm thickness on a silicon substrate 1. On the insulating film 2 are formed an Al-Si
Cu alloy film 3-1 by a 500 nm thickness and a titanium nitride (TiN) film 3-2 by a 100 nm thickness both by sputtering. These films 31 and 3-2 will make a wiring layer later. There is further formed a patterned silicon dioxide film 4 by a 300 nm thickness on the TiN film 3-2. The patterned silicon dioxide film 4 will act as an etching mask when the Al-Si-Cu alloy film 3-1 and the TiN film 3-2 are etched.
Fig. 2B illustrates the TiN film 3-2 being etched with a chlorine gas only. As illustrated, there are formed irregularities 6 at a surface of the TiN film 3-2.
Fig. 2C illustrates the Al-Si-Cu film 3-1 being etched with a chlorine gas only. Since the irregularities 6 produced when the TiN film 3-2 is etched act as micro-masks, there are formed pillar-like projections 7 at a surface of the Al-Si
Cu film 3-1.
Fig. 2D illustrates a resultant after wiring etching has been carried out.
Since the configuration as illustrated in Fig. 2C is entirely reflected to a configuration of an etched surface of the Al-Si-Cu film 3-1, etching residues 7a are left unetched. In addition, the Al-Si-Cu film 3-1 is side-etched.
As explained with reference to Figs. 2A to 2D, when a titanium nitride film is etched only with a chlorine gas, an aluminum including film such as the
Al-Si-Cu film 31 is side-etched, and in addition, there are produced irregularities at a surface of a titanium nitride film, which irregularities in turn cause etching residues. The thicker a titanium nitride film is, the greater the surface irregularities are. The generation of etching residues is accompanied a problem of shortcircuit between wiring layers.
Japanese Unexamined Patent Publication 3-12087 has suggested a process of etching a titanium nitride film by using a mixture gas of BCl3 and C12 gases. However, it is not suggested as to how much volume the BCl3 gas should have based on a total volume of the mixture gas.
Japanese Unexamined Patent Publication 63-289935 has suggested a process of etching a titanium nitride film by using a mixture gas of BCl3, SiCl4 and Cl2 gases. However, the Publication does not explain at all how a crosssectional shape and surface irregularities can be controlled.
SUMMARY OF THE INVENTION
It is an object of at least the preferred embodiments of the present invention to provide a method of fabricating a semiconductor device, which method is capable of preventing side-etching and production of etching residues when a multi-layered film including an aluminum alloy film and a silicon nitride film is patterned, to thereby provide a quite thin wiring layer having high reliability.
There is provided a method of fabricating a semiconductor device, including the steps of (a) forming a first insulating film on a semiconductor substrate, (b) forming a multi-layered film on the first insulating film, the multilayered film induding at least a titanium nitride (TiN) film and an aluminum alloy film, (c) forming a second insulating film on the multi-layered film, (d) patterning the second insulating film into a desired pattern, and (e) patterning the multi-layered film with the thus patterned second insulating film being used as a mask by plasma-etching in which a mixture gas including a chlorine (Cl2) gas and a reducing gas is used as an etching gas, a volume ratio of the reducing gas to both of the chlorine and reducing gases being equal to or greater than 15%.
By employing a mixture gas of a chlorine gas a reducing etching gas, a titanium nitride film would be readily etched, and it is possible to prevent generation of surface irregularities at a surface of a titanium nitride film.
For instance, there may be used a boron trichloride (BCl3) gas as the reducing gas.
It is preferable that the volume ratio of the reducing gas is equal to or smaller than 70%. The second insulating film may be a silicon dioxide film.
The mixture gas may further include a nitrogen gas (N2), in which case a volume ratio of the nitrogen gas to all of the chlorine, reducing and nitrogen gases may be in the range of 5% to 50S0 both- inclusive. By adding a nitrogen gas to the mixture gas of Cl2 and reducing gases, aluminum nitride is deposited again on a sidewall of the aluminum alloy film and acts as a protection film to thereby prevent side-etching of the aluminum alloy film.
As mentioned above, in the method in accordance with the present invention, a mixture gas of BC13 and C12 gases are employed as an etching gas for etching a multi-layered film including an aluminum alloy film and a titanium nitride film. A volume ratio of BC13 gas to BC13 and C12 gases, namely BC13 1 (BCl3 + Cm2), is set to be at least 15%. This makes it possible to prevent generation of surface irregularities at a surface of a titanium nitride film when etched. As a result, it is also possible to prevent generation of etching residues which would be generated due to surface irregularities of a titanium nitride film, resulting in prevention shortcircuit between wiring layers.
In addition, it is possible to prevent side-etching of an aluminum alloy film by adding a nitrogen gas to the mixture gas of BC13 and C12 gases. Thus, the inventive method provides a semiconductor device having highly reliable, quite thin wiring layers.
BRIEF DESCRIflON OF THE DRAWINGS
Figs. 1A and 1B are cross-sectional views of a semiconductor device, illustrating respective steps of a conventional method of fabricating a semiconductor device.
Figs. 2A to 2D are cross-sectional views of a semiconductor device, illustrating respective steps of another conventional method of fabricating a semiconductor device.
Fig. 3 is a schematic view illustrating a high frequency plasma etching apparatus to be employed for reducing the present invention to practice.
Figs. 4A to 4C are cross-sectional views of a semiconductor device, illustrating respective steps of a method in accordance with the first embodiment of the present invention.
Fig. 5A is a graph showing a relation between surface irregularities and a volume ratio of BCl3 gas to BC13 and C12 gases in etching of a titanium nitride film by employing a mixture gas of BCl3 and Cl2 gases.
Fig. 5B illustrates definition of a maximum height in surface irregularities.
Fig. 6A is a graph showing a relation between side-etch depth and a volume ratio of N2 gas to BCl3, Cl2 and N2 gases in etching of an Al-Si-Cu alloy film by employing a mixture gas of BCl3, Cl2 and N2 gases.
Figs. 6B and 6A illustrate definition of side-etch depth.
Figs. 7A to 7D are cross-sectional views of a semiconductor device, illustrating respective steps of a method in accordance with the second embodiment of the present invention.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
First, hereinbelow is explained an etching apparatus to be used for etching process. In first and second embodiments described hereinbelow, there is used a reactive ion etching (RIE) apparatus illustrated in Fig. 3, specifically a parallel plate type high frequency plasma etching apparatus. The RIE apparatus has an etching chamber 103 in which a semiconductor wafer 100 is fixed on a wafer stage 101. Air in the etching chamber 103 is exhausted outside through an exhaust port 102 to thereby keep the etching chamber 103 sufficiently evacuated.
Then, an etching gas is introduced into the etching chamber 103 through an gas introduction port 104, and the etching chamber 103 is adjusted to have a predetermined pressure. Then, a radio frequency (RF) power source 105 provides
RF electric power of 13.56 MHz to the wafer stage 101 through a blocking capacitor 106 to thereby produce plasma in the etching chamber 103 for carrying out etching.
Hereinbelow is described a method in accordance with the first embodiment.
As illustrated in Fig. 4A, an insulating film 2 is formed by thermal oxidation by a 500 nm thickness on a silicon substrate 1. Then, there is formed a barrier film 8 by sputtering on the insulating film 2. The barrier film 8 includes a titanium film having a thickness of 100nm, and a titanium nitride film having a thickness of 300 nm and deposited on the titanium film. Subsequently, there is formed an Al-Si-Cu alloy film 3-1A is formed by a 900 nm thickness on the barrier film 8. The Al-Si-Cu alloy film 3-1A contains Si at 1 weight % and Cu at 0.5 weight A. Then, there is formed a silicon dioxide film 9 by a 300 nm thickness on the Al-Si-Cu alloy film 3-1A by plasma-enhanced chemical vapor deposition (PCVD). Then, there is formed a photoresist film by a 1 jim thickness on the silicon dioxide film 9. The photoresist film is then patterned by photolithography process to thereby form a photoresist pattern 10.
Then, the silicon dioxide film 9 is etched with the photoresist pattern 10 being used as a mask. Then, the photoresist pattern 10 is removed by ashing to thereby make masks 9a from the silicon dioxide film 9, as illustrated in Fig. 4B.
Then, the Al-Si-Cu alloy film 3-lA and the barrier film 8 including TiN and Ti films are etched by using the masks 9a.
For example, the etching was carried out in the following conditions.
Flow rate of BCl3 gas: 15 sccm
Flow rate of Cl2 gas: 60 sccm
Flow rate of N2 gas: 10 sccm
Pressure in the etching chamber 103: 0.13 Pa
RF electric power: 150 W
As a result, there was formed a wiring layer composed of a multi-layered film including an Al-Si-Cu alloy film 3-1Aa and a barrier film 8a, as illustrated in Fig.
4C. Thus, there was formed a wiring layer having a vertical sidewall not sideetched without generation of etching residues.
Fig. 5A illustrates a graph showing a relation between surface roughness Rmax and BC13 content, found when a titanium nitride film is plasma-etched employing a mixture gas of BC13 and Cl2 gases. An ordinate axis indicates the surface roughness Rmax which means a so-called maximum height used in mechanical engineering, and is defined as a maximum height of a "mountain" among various heights of mountains in irregularities, as illustrated in Fig. 5B. An abscissa axis indicates a volume ratio of BCl3 gas to a mixture gas of BC13 and Cl2 gases, that is, a volume ratio defined as BCl3 / (BCl3 + Cl2). The graph in Fig. 5A shows data obtained when a titanium nitride film having a thickness of 500 nm was etched over an entire surface thereof by an about 300 nm depth.
The etching was carried out in the following condition.
Pressure in the etching chamber 103: 0.13 Pa
RI; electric power: 150 W
As indicated in the graph, the surface roughness Rmax is decreased as the volume ratio is increased. Thus, it is considered that etching residues can be eliminated by setting the volume ratio to be greater than a certain value when a titanium nitride film is etched. By conducting a lot of experiments, the inventor has confirmed that a wiring layer could be formed without generation of etching residues by setting the volume ratio, BCl3 / (BCl3 + C12), to be equal to or greater than 15%. The surface roughness of a titanium nitride film after having been etched tends to be greater as etching makes progress. A titanium nitride film is used as a film for preventing reflection or a barrier film in the formation of a wiring layer, or used for enhancing a resistance to stress migration, but it is not preferable to form a titanium nitride film so thick because titanium nitride has a low electricity conductivity. Thus, it is considered that Fig. 5A shows an upper limit of surface roughness for the formation of a thin wiring layer. Accordingly, it is considered possible to sufficiently prevent generation of etching residues by setting the volume ratio defined as BCl3 /(BCl3 + Cl2) to be equal to or greater than 15%.
On the other hand, as is understood in view of the graph shown in Fig.
SA, even if the volume ratio is set to be equal to or greater than 70%, the surface roughness is not made smaller. To the contrary, an etching rate for aluminum is decreased. Thus, it is preferable for the volume ratio to be equal to or smaller than 70%. Hence, it is preferable that the volume ratio is determined in the range of 15% to 70% both inclusive. It should be noted that addition of anitrogen (N2) gas to the mixture gas of BCl3 and Cl2 gases would exert no influence on the surface roughness of a titanium nitride film.
Hereinbelow is explained about etching of an Al-Si-Cu alloy film to be carried out employing a mixture gas of BCl3, Cl2 and N2 gases. Fig. 6A illustrates a graph showing a relation between a side-etch depth D and a volume ratio of a nitrogen gas to all of BC13, Cl2 and N2 gases, defined as N2 / (BCl3 + Cl2 + N2), which relation is found when an Al-Si-Cu alloy film having a thickness of 500 nm is etched employing a mixture gas of BCl3, C12 and N2 gases with a silicon dioxide film being used as a mask. The silicon dioxide film mask has a thickness of 0.4 jim. The side-etch depth D is defined as illustrated in Figs. 6B and 6C.
Specifically, the side-etch depth D as defined in Fig. 6B means a positive range in the ordinate axis in the graph, whereas the side-etch depth D as defined in Fig. 6C means a negative range in the ordinate axis in the graph. The plotted data in the graph was obtained in the following conditions.
BCl3 / (BCl3 + C12): 20%
Flow rate of BCl3 gas: 15 sccm
Flow rate of Cl2 gas: 60 sccm
Pressure in the etching chamber: about 0.1 Pa
Referring to Fig. 6A, it is understood that there occurs side-etch if the volume ratio is smaller than about 5%. Thus, in order to prevent side-etching, the volume ratio defined as N2 / (BCl3 + Cl2 + N2) needs to be equal to or greater than 5%.
It is also understood that a wiring layer has an inwardly recessed cross section 29 as illustrated in Fig. 6B in a range where the volume ratio is equal to or smaller than about 5%, whereas a wiring layer has an outwardly tapered crosssection 30 as illustrated in Fig. 6C, as the volume ratio is increased beyond about 5%. A wiring layer having a tapered cross-section is not always to be excluded, but inevitably reduces processing accuracy. Thus, an upper limit of the volume ratio may be determined taking allowable range of dimension accuracy into consideration. For instance, it would be appropriate to determine the volume ratio to be about 50% for a wiring layer having a thickness of 0.4 jim.
In view of the graph in Fig. 6A, it is confirmed that the addition of a nitrogen gas to a mixture gas of BC13 + C12 gases makes it possible to control a cross-section of a wiring layer. The reason is considered that there is produced aluminum nitride when an Al-Si-Cu alloy film is etched, and the thus produced aluminum nitride is deposited again onto a sidewall of the alloy film and acts as a protection film. The thus produced protection film may be removed together with the silicon dioxide film mask, however, it is not always necessary to do so.
It is considered that the protection film may prevent a wiring layer from reacting with humidity in subsequent steps.
As mentioned earlier, Japanese Unexamined Patent Publication No. 312087 has suggested the use of a mixture gas of BCl3 and Cl2 gases for etching a titanium nitride film. However, the Publication does mention neither the volume ratio defined as BCl3 / (BC13 + C12) nor a relation the volume ratio and surface roughness. In addition, the Publication never suggests the addition of a nitrogen gas to a mixture gas of BC13 and Cl2 gases for controlling a cross-sectional shape of a wiring layer. Though Japanese Unexamined Patent Publication No.
63289935 has suggested the use of a mixture gasof BCl3, SiC14 and Cl2 gases for etching a titanium nitride film, as mentioned earlier, the Publication never suggests how a cross-sectional shape of a wiring layer and surface roughness can be controlled.
A method in accordance with the second embodiment will be explained hereinbelow with reference to Figs. 7A to 7D.
As illustrated in Fig. 7A, an insulating film 2 is formed by thermal oxidation by a 500 nm thickness on a silicon substrate 1. Then, there are formed an Al-Si-Cu alloy film 3-1B by a 500 nm thickness on the insulating film 2, and a titanium nitride film 3-2A by a 100 nm thickness on the Al-Si-Cu alloy film 3-1B both by sputtering. Then, there is formed a silicon dioxide film 9 by a 300 nm thickness on the titanium nitride film 3-2A by plasma-enhanced chemical vapor deposition (PCVD). Then, there is formed a photoresist film pattern 10 by a 1 jim thickness on the silicon dioxide film 9 by photolithography process.
Then, the silicon dioxide film 9 is etched with the photoresist film pattern 10 being used as an etching mask. Then, the photoresist film pattern 10 is removed by ashing to thereby make masks 9a from the silicon dioxide film 9, as illustrated in Fig. 7B.
Then;- the titanium nitride film 3-2A and the Al-Si-Cu alloy film 3-1B are etched employing the silicon dioxide film masks 9a. Etching conditions are as follows.
Etching gas:BCl3/Cl2/N2 mixture gas
Flow rate of BCl3 gas: 20 sccm
Flow rate of Cl2 gas: 60 sccm
Flow rate of N2 gas: 15 sccm
Etching apparatus: High frequency plasma etching apparatus illustrated in Fig.3 Reaction pressure: 20 Pa
RF electric power: 150 W
Fig. 7C illustrates a shape of the titanium nitride film 3-2A being etched. A surface 3-2Aa of the titanium nitride film 3-2A being etched is flat.
Fig. 7D illustrates a resultant after wiring etching has been completed.
As illustrated, there is obtained a properly etched wiring layer composed of a twolayered film including the titanium nitride film 3-2A and the Al-Si-Cu alloy film 3-1B without occurrence of side-etching and further without generation of etching residues. When a thick titanium nitride film is formed over an aluminum alloy film like the instant embodiment, surface irregularities generated while the titanium nitride film is being etched are often accompanied with generation of etching residues. However, such generation of etching residues can be avoided by setting the volume ratio defined as BCl3 I (BCl3 + Cl2) to be slightly greater.
In the above mentioned first and second embodiments, a multi-layered film including an Al-Si-Cu alloy film is etched. However, there may be employed an alloy film containing aluminum at least as a principal ingredient in place of the Al-Si-Cu alloy film. In addition, though a silicon dioxide film is used for an etching mask in the above mentioned embodiments, there may be employed an insulating film instead such as a silicon nitride film and a silicon trinitride film. To sum up, there may be used any insulating film in plasma etching in which a mixture gas of BC13 and C12 gases is employed, unless the film is less likely to be etched than a titanium nitride film and an aluminum alloy film, has sufficient masking characteristic, and is an insulating film usually used in the formation of a semiconductor device.
While the present invention has been described by way of example only in connection with certain preferred embodiments, it is to be understood that the subject matter encompassed by way of the present invention is not to be limited to those specific embodiments. On the contrary, it is intended for the subject matter of the invention to include all alternatives, modifications and equivalents as can be included within the spirit and scope of the following claims.
Each feature disclosed in this specification (which term includes the claims) and/or shown in the drawings may be incorporated in the invention independently of other disdosed and/or illustrated features.
The abstract as filed herewith is repeated here as part of the specification.
A method of fabricating a semiconductor device is characterized in that a mixture gas including chlorine (C12) gas and boron trichloride (by13) gas is employed as an etching gas when a multi-layered film including an aluminum alloy film (3-lAa) and a titanium nitride film (8a) is etched. The volume ratio of the BCl3 gas to both of the C12 and BCl3 gases is set to be equal to or greater than 15%. The method can prevent irregularities from being generated on a surface of the titanium nitride film when etched, which in turn can prevent generation of etching residues which may occur due to such irregularities, thereby reducing the probability of a shortcircuit between wiring layers.
Reference numerals are included in the claims merely for ease of understanding and shall have no effect on the scope or interpretation thereof.
Claims (9)
1. A method of fabricating a semiconductor device, comprising the steps of:
(a) forming a first insulating film (2) on a semiconductor substrate (1);
(b) forming a multi-layered film (8,3-1A; 3-lB,3-2A) on the first insulating film (2), the multi-layered film including at least a titanium nitride (TiN) film (8,32A) and an aluminum alloy film (3-lA,3-lB);
(c) forming a second insulating film (9) on the multi-layered film (8,3-1A; 3-1B,3-2A); (d) patterning the second insulating film (9) into a desired pattern; and
(e) patterning the multi-layered film (8,3-1A; 3-1B,3-2A) with the thus patterned second insulating film (9a) being used as a mask by plasma-etching in which a mixture gas including a chlorine (C 12) gas and a reducing gas is used as an etching gas, the ratio of the volume of the reducing gas to the total volume of the chlorine and reducing gases being equal to or greater than 15 %.
2. The method as set forth in claim 1, wherein the reducing gas is boron trichloride (by 13) gas.
3. The method as set forth in claim 1 or 2, wherein the said volume ratio of the reducing gas is equal to or smaller than 70%.
4. The method as set forth in claim 1 or 2, wherein the second insulating film (9) is a silicon dioxide film.
5. The method as set forth in claim 1 or claim 2, wherein the mixture gas further includes nitrogen gas (N2).
6. The method as set forth in claim 5, wherein the volume ratio of the reducing gas is equal to or smaller than 70%.
7. The method as set forth in claim 5, wherein the ratio of the volume ratio of the nitrogen gas to the total volume of all of the chlorine, reducing and nitrogen gases is equal to or greater than 5 % .
8. The method as set forth in claim 7, wherein the said volume ratio of the nitrogen gas is equal to or smaller than 50%.
9. A method of fabricating a semiconductor device substantially as herein described with reference to any of figures 3 to 7 of the accompanying drawings and/or with reference to any of the examples.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP08137225A JP3112832B2 (en) | 1996-05-30 | 1996-05-30 | Method for manufacturing semiconductor device |
Publications (3)
Publication Number | Publication Date |
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GB9711309D0 GB9711309D0 (en) | 1997-07-30 |
GB2313708A true GB2313708A (en) | 1997-12-03 |
GB2313708B GB2313708B (en) | 1998-07-29 |
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Application Number | Title | Priority Date | Filing Date |
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GB9711309A Expired - Fee Related GB2313708B (en) | 1996-05-30 | 1997-05-30 | Method of fabricating semiconductor device |
Country Status (3)
Country | Link |
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JP (1) | JP3112832B2 (en) |
KR (1) | KR100252492B1 (en) |
GB (1) | GB2313708B (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2777114A1 (en) * | 1998-04-03 | 1999-10-08 | United Microelectronics Corp | METHOD OF ATTACKING A TANTALUM OXIDE LAYER |
GB2337361A (en) * | 1998-05-06 | 1999-11-17 | United Microelectronics Corp | A method of etching a tantalum oxide layer in the fabrication of a DRAM |
DE102004022402A1 (en) * | 2004-05-06 | 2005-12-15 | Infineon Technologies Ag | Dry etching of layer sequence, for anisotropic etching of aluminum-containing substrates, by etching fourth layer in plasma comprising halogen-containing gas, and third layer in plasma comprising halogen- and nitrogen-containing gases |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6177353B1 (en) * | 1998-09-15 | 2001-01-23 | Infineon Technologies North America Corp. | Metallization etching techniques for reducing post-etch corrosion of metal lines |
JP3257533B2 (en) | 1999-01-25 | 2002-02-18 | 日本電気株式会社 | Wiring formation method using inorganic anti-reflection film |
JP3733021B2 (en) * | 2000-12-15 | 2006-01-11 | シャープ株式会社 | Plasma process method |
JP4546667B2 (en) * | 2001-05-17 | 2010-09-15 | 東京エレクトロン株式会社 | Dry etching method |
KR100453956B1 (en) * | 2001-12-20 | 2004-10-20 | 동부전자 주식회사 | Method for manufacturing metal line of semiconductor device |
JP5237306B2 (en) * | 2010-01-07 | 2013-07-17 | 日本電信電話株式会社 | Semiconductor integrated circuit device and method for manufacturing semiconductor integrated circuit device |
WO2021171458A1 (en) * | 2020-02-27 | 2021-09-02 | 株式会社日立ハイテク | Plasma processing method |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5350488A (en) * | 1992-12-10 | 1994-09-27 | Applied Materials, Inc. | Process for etching high copper content aluminum films |
US5411631A (en) * | 1992-11-11 | 1995-05-02 | Tokyo Electron Limited | Dry etching method |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5217570A (en) * | 1991-01-31 | 1993-06-08 | Sony Corporation | Dry etching method |
JPH06104222A (en) * | 1992-09-18 | 1994-04-15 | Fujitsu Ltd | Manufacture of semiconductor device |
-
1996
- 1996-05-30 JP JP08137225A patent/JP3112832B2/en not_active Expired - Fee Related
-
1997
- 1997-05-30 GB GB9711309A patent/GB2313708B/en not_active Expired - Fee Related
- 1997-05-30 KR KR1019970022319A patent/KR100252492B1/en not_active IP Right Cessation
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5411631A (en) * | 1992-11-11 | 1995-05-02 | Tokyo Electron Limited | Dry etching method |
US5350488A (en) * | 1992-12-10 | 1994-09-27 | Applied Materials, Inc. | Process for etching high copper content aluminum films |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2777114A1 (en) * | 1998-04-03 | 1999-10-08 | United Microelectronics Corp | METHOD OF ATTACKING A TANTALUM OXIDE LAYER |
US6001742A (en) * | 1998-04-03 | 1999-12-14 | United Microelectronics Corp. | Method for etching tantalum oxide layer |
GB2337361A (en) * | 1998-05-06 | 1999-11-17 | United Microelectronics Corp | A method of etching a tantalum oxide layer in the fabrication of a DRAM |
NL1009201C2 (en) * | 1998-05-06 | 1999-11-22 | United Microelectronics Corp | Method for etching a tantalum oxide layer. |
GB2337361B (en) * | 1998-05-06 | 2000-03-29 | United Microelectronics Corp | Method of etching tantalum oxide layer |
DE102004022402A1 (en) * | 2004-05-06 | 2005-12-15 | Infineon Technologies Ag | Dry etching of layer sequence, for anisotropic etching of aluminum-containing substrates, by etching fourth layer in plasma comprising halogen-containing gas, and third layer in plasma comprising halogen- and nitrogen-containing gases |
DE102004022402B4 (en) * | 2004-05-06 | 2007-03-15 | Infineon Technologies Ag | Process for the anisotropic etching of aluminum-containing substrates |
Also Published As
Publication number | Publication date |
---|---|
GB9711309D0 (en) | 1997-07-30 |
GB2313708B (en) | 1998-07-29 |
JP3112832B2 (en) | 2000-11-27 |
JPH09321026A (en) | 1997-12-12 |
KR100252492B1 (en) | 2000-05-01 |
KR970077353A (en) | 1997-12-12 |
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