GB2289060B - Method for producing an insulation layer on a silicon wafer - Google Patents

Method for producing an insulation layer on a silicon wafer

Info

Publication number
GB2289060B
GB2289060B GB9508954A GB9508954A GB2289060B GB 2289060 B GB2289060 B GB 2289060B GB 9508954 A GB9508954 A GB 9508954A GB 9508954 A GB9508954 A GB 9508954A GB 2289060 B GB2289060 B GB 2289060B
Authority
GB
United Kingdom
Prior art keywords
producing
insulation layer
silicon wafer
wafer
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB9508954A
Other versions
GB9508954D0 (en
GB2289060A (en
Inventor
Franz Laermer
Andrea Schilp
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Publication of GB9508954D0 publication Critical patent/GB9508954D0/en
Publication of GB2289060A publication Critical patent/GB2289060A/en
Application granted granted Critical
Publication of GB2289060B publication Critical patent/GB2289060B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Materials Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Formation Of Insulating Films (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Element Separation (AREA)
GB9508954A 1994-05-03 1995-05-03 Method for producing an insulation layer on a silicon wafer Expired - Fee Related GB2289060B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE4415567A DE4415567B4 (en) 1994-05-03 1994-05-03 Method for producing an SOI structure with an insulation layer on a silicon wafer and a silicon layer epitaxially applied thereon

Publications (3)

Publication Number Publication Date
GB9508954D0 GB9508954D0 (en) 1995-06-21
GB2289060A GB2289060A (en) 1995-11-08
GB2289060B true GB2289060B (en) 1998-01-07

Family

ID=6517169

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9508954A Expired - Fee Related GB2289060B (en) 1994-05-03 1995-05-03 Method for producing an insulation layer on a silicon wafer

Country Status (2)

Country Link
DE (1) DE4415567B4 (en)
GB (1) GB2289060B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10345990B4 (en) * 2003-10-02 2008-08-14 Infineon Technologies Ag Method for producing an oxide layer
DE102005048361B4 (en) * 2005-10-10 2011-07-14 X-FAB Semiconductor Foundries AG, 99097 Method for locally coating semiconductor circuits and discrete components with a thermal SiO 2 layer whose surfaces contain areas with needle-shaped structures in nanometer dimensions
US8350209B2 (en) 2005-10-10 2013-01-08 X-Fab Semiconductor Foundries Ag Production of self-organized pin-type nanostructures, and the rather extensive applications thereof
DE102005048366A1 (en) 2005-10-10 2007-04-19 X-Fab Semiconductor Foundries Ag A process for the preparation of low-defect self-organized needle-like structures with nano-dimensions in the range below the usual light wavelengths with high aspect ratio

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0179491A2 (en) * 1984-10-25 1986-04-30 Nec Corporation Formation of single-crystal silicon layer by recrystallization
US4818711A (en) * 1987-08-28 1989-04-04 Intel Corporation High quality oxide on an ion implanted polysilicon surface
JPH02194522A (en) * 1989-01-23 1990-08-01 Fuji Electric Co Ltd Manufacture of soi substrate
GB2241114A (en) * 1990-02-16 1991-08-21 Mitsubishi Electric Corp Method of producing soi structures
US5308445A (en) * 1991-10-23 1994-05-03 Rohm Co., Ltd. Method of manufacturing a semiconductor device having a semiconductor growth layer completely insulated from a substrate

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3053678B2 (en) * 1991-10-23 2000-06-19 ローム株式会社 Method for manufacturing semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0179491A2 (en) * 1984-10-25 1986-04-30 Nec Corporation Formation of single-crystal silicon layer by recrystallization
US4818711A (en) * 1987-08-28 1989-04-04 Intel Corporation High quality oxide on an ion implanted polysilicon surface
JPH02194522A (en) * 1989-01-23 1990-08-01 Fuji Electric Co Ltd Manufacture of soi substrate
GB2241114A (en) * 1990-02-16 1991-08-21 Mitsubishi Electric Corp Method of producing soi structures
US5308445A (en) * 1991-10-23 1994-05-03 Rohm Co., Ltd. Method of manufacturing a semiconductor device having a semiconductor growth layer completely insulated from a substrate

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
WPI Accession No. 90-278169/37 & JP 2 194 522 A *

Also Published As

Publication number Publication date
GB9508954D0 (en) 1995-06-21
GB2289060A (en) 1995-11-08
DE4415567B4 (en) 2004-11-04
DE4415567A1 (en) 1995-11-09

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20090503