GB2238890A

GB2238890A - Circuit for stabilizing a reference voltage

Info

Publication number: GB2238890A
Application number: GB9013423A
Authority: GB
Inventors: Hoon Choi
Original assignee: Samsung Electronics Co Ltd
Current assignee: Samsung Electronics Co Ltd
Priority date: 1989-10-24
Filing date: 1990-06-15
Publication date: 1991-06-12
Also published as: KR920004587B1; GB9013423D0; JPH03142778A; DE4018457A1; KR910008939A

Abstract

A circuit for stabilizing a potential difference between a supply voltage terminal (Vcc) and ground (Vss), comprises diodes (D1, D2) connected between the supply voltage terminal and ground, a reference voltage output (OUT) being taken from that terminal of the diodes which is the further from ground. The diodes are connected to ground through a bias-adjusting MOS transistor (M3) providing a variable-resistance path. A negative feedback loop (1) controls the resistance of the transistor (M3) to stabilise the reference voltage level. The circuit is useful with a semiconductor memory device, in which case the negative feedback loop (1) comprises MOS transistors acting as voltage dividing resistances (M1, M2). <IMAGE>

Description

1 1 :2 2! ----1 E& E1 sa cl 1 CIRCUIT FOR STABILIZING A REFERENCE VOLTAGE

The present invention relates to a circuit for stabilizing a reference voltage which can hold constant the reference voltage independently of changes in a supply voltage. It is particularly, but not exclusively, concerned with reference voltages applied to memory devices.

Generally, memory devices need a circuit for stabilizing a reference voltage to hold the voltage constant independently of the magnitude of the applied supply voltage. In a conventional circuit, in order hold constant the reference voltage, two diodes, of which a threshold voltage sum becomes the reference voltage, are serially connected, thereby holding the reference voltage constant. But, as the temperature increases by 1 deg C, the threshold voltage of diodes reduces by 2mV. Thus, the diodes cannot hold the reference voltage constant since the threshold voltage of the diodes changes according to changes in their temperature.

An object of the present invention is therefore to provide a stabilizing circuit for a reference voltage which holds the reference voltage constant independently of temperature changes.

The invention provides a circuit for stabilizing a 2 potential difference between a supply voltage terminal and a ground, comprising diode means connected between the supply voltage terminal and ground, the reference voltage output being taken from that terminal of the diode means which is the further from the ground, characterised in that the diode means is connected to the ground through a bias-adjusting semiconductor device providing a variable-resistance path, and in that a negative feedback loop is connected between the reference voltage output and a control terminal of the bias-adjusting semiconductor device to increase or decrease the resistance of the variable-resistance path in response respectively to a corresponding voltage decrease or increase at the reference voltage output such as to stabilise the reference voltage level.

Such a circuit for stabilizing a reference voltage can be used widely in all memory devices by the addition of a simple circuit to a conventional circuit.

These and other objects, features, and advantages of the present invention will become more apparent from the following description of a preferred embodiment thereof taken in conjunction with the accompanying drawings, in which:

Fig. 1 shows a conventional circuit for stabilizing a reference voltage to hold the reference voltage constant independently of a supply voltage, and i 1 a a 3 Fig. 2 shows a detailed circuit embodying the present invention, for stabilizing a reference voltage to hold the reference voltage constant independently of changes in temperature as well as in the supply voltage.

The conventional circuit shown in Figure 1 holds constant a reference voltage independently of the magnitude of a supply voltage Vcc and is used for memory devices. A resistor R1 and two forward-biased diodes D1 and D2 are connected in series between a supply voltage terminal Vcc and a ground Vss. The memory devices are connected to an output terminal OUT of the resistor R1. That is, the sum of the threshold voltages of the diodes D1 and D2 is provided through the output terminal OUT independently of the supply voltage Vcc, so that a constant voltage corresponding to the sum of these threshold voltages of the diodes D1 and D2 is provided to the memory devices. Typically, however, the threshold voltage of the diodes reduces by 2mV as the temperature increases by 1 deg C. Consequently, the reference voltage provided through the output terminal OUT reduces with the increase in temperature, so that the output reference voltage is not constant when the temperature changes.

Fig. 2 shows in detail a circuit which holds the reference voltage applied to the memory devices constant independently of changes of temperature and fluctuations t 4 in the supply voltage.

A negative feedback part 1 for executing feedback of a reference voltage provided from the resistor RI, and a control part 2 for controlling, by constant re-adjustment, the reference voltage by changing the transconductance of a MOS transistor M3 according to the output signal from the negative feedback part 1, are added to the conventional stabilizing circuit of Figure 1 having the resistor R1 and the diodes D1 and D2. In the negative feedback part 1, the gate and drain of a MOS transistor M1 are connected to the output terminal OUT of the resistor R1, and the gate and drain of a MOS transistor M2 are connected at N1 to the source of the MOS transistor M1. Also, the source of the MOS transistor M2 is connected to the ground Vss. The gate and drain of the aforementioned bias-controlling MOS transistor M3 in the control part 2 are connected respectively to the source at N1 of the MOS transistor M1 and to the output terminal of the diode D2, while its source is connected to the ground Vss.

When the temperature rises, the threshold voltage of the diodes D1 and D2 reduces, thereby reducing the reference voltage. At the same time, the transconductance of the bias-adjusting MOS transistor M3 in the control part 2 is lowered, causing the output reference voltage through the output terminal OUT to 1 k A increase just sufficiently to compensate for the change. In other words, if the reference voltage is lowered by the reduction of the threshold voltage of the diodes D1 and D2 due to the increase of temperature, then the voltage divided by the MOS transistors M1 and M2 in the negative feedback part 1 is also lowered and the lowered voltage is applied to the gate of the bias-adjusting MOS transistor M3 in the control part 2. Depending on the voltage applied to the gate of the MOS transistor M3, the transconductance of the MOS transistor M3 changes; its transconductance increases when the gate voltage of the MOS transistor increases, and it reduces when the gate voltage of the MOS transistor reduces. Thus, the resistance of the MOS transistor M3 is increased by the lowered gate voltage, divided by the MOS transistors M1 and M2 in the negative feedback part 1, so that the voltage difference b6tween the drain and source of the MOS transistor M3 increases and the output reference voltage for the memory devices increases, too.

In the same way, if the temperature goes down, then the threshold voltage of the diodes D1 and D2 increases so that the voltage divided by the MOS transistors M1 and M2 increases. At the same time, the increased voltage is applied to the gate of the MOS transistor M3 in the control part 2 to increase the transconductance 6 of the MOS transistor M3, so that the resistance of the MOS transistor M3 reduces. That is, the output reference voltage goes down since the voltage difference between the drain and source of the MOS transistor M3 reduces.

To summarise, the circuit embodying the present invention can hold constant the reference voltage applied to the memory devices through the output terminal by controlling the reference voltage such that when the temperature increases the reference voltage is prevented from dropping by applying the lowered voltage, which is divided by MOS transistors in a negative feedback part, to a control part, and when the temperature is reduced the reference voltage is prevented from rising by applying the increased voltage, which is divided by MOS transistors in the negative feedback part, to the control part.

The negative feedback part 1 has only two MOS transistors M1 and M2, and the control part 2 has one MOS transistor M3, so that the design is simple enough to be applicable to all conventional circuits for stabilizing a reference voltage.

The invention is in no way limited to the embodiment described hereinabove. Various modifications of disclosed embodiment as well as other embodiments of the invention will become apparent to persons skilled in the art upon reference to the description of the invention.

1 b A i 7 For example, there may be only one diode instead of two series diodes; and the diode or diodes may be replaced with transistors connected so as to function as diodes insofar as they exhibit a threshold bias-voltage in one direction. It is therefore contemplated that the appended claims will cover any such modifications or embodiments as fall within the true scope of the invention.

8

Claims

1. A circuit for stabilizing a potential difference between a supply voltage terminal and a ground, comprising diode means connected between the supply voltage terminal and ground, the reference voltage output being taken from that terminal of the diode means which is the further from the ground, characterised in that the diode means is connected to the ground through a bias-adjusting semiconductor device providing a variable-resistance path, and in that a negative feedback loop is connected between the reference voltage output and a control terminal of the bias-adjusting semiconductor device to increase or decrease the resistance of the variable-resistance path in response respectively to a corresponding voltage decrease or increase at the reference voltage output such as to stabilise the reference voltage level.

2. A circuit according to claim 1, in which the bias-adjusting semiconductor device is a field effect transistor whose gate is connected to the negative feedback loop, the variable-resistance path being that between its source and drain. q

3. A circuit according to claim 2, in which the field effect transistor is a MOS transistor.

4. A circuit according to claim 1, 2 or 3, in which 1 1 9 the diode means comprises at least one diode.

5. A circuit according to claim 4, in which the diode means comprises two series-connected diodes.

6. A circuit according to any preceding claim, in which the supply voltage terminal is connected to the diode means through a resistance.

7. A circuit according to any preceding claim, in which the negative feedback loop is connected to the ground and comprises means for dividing the reference voltage output and supplying the divided voltage as a control voltage to the bias-adjusting semiconductor device.

8. A circuit according to claim 7, in which the dividing means comprises a plurality of field effect transistors connected as resistances in series.

9. A circuit according to claim 8, in which the field effect transistors are MOS transistors.

10. A circuit for stabilizing a reference voltage, having a resistor and diodes serial-connected to a supply voltage terminal, comprising a negative feedback part for executing a feedback of a reference voltage provided through the resistor; and a control part connected between a ground and an output terminal of the diodes for controlling the reference voltage by changing the transconductance of a MOS transistor using the output voltage of said negativ feedback part as an input voltage.

11. A circuit substantially as described herein with reference to Figure 2 of the accompanying drawings.

1 t 1 A A Published 1991 at 17he Patent Ofike. State House. 66171 High Holborn, London WC1 R 47p. Further copies rnay be obtained frorn Mes Branch, Unit 6. Nine Mile Point Cwrnklinfach. Cross Keys. Newport. NPI 7HZ. Printed by Multiplex techniques lid. St Mwy Cray. Kent.