GB2224869A

GB2224869A - Digital comparator trigger signal

Info

Publication number: GB2224869A
Application number: GB8922263A
Authority: GB
Inventors: John Mcgibbon
Original assignee: Nicolet Instrument Corp
Current assignee: Thermo Electron Scientific Instruments LLC
Priority date: 1988-11-07
Filing date: 1989-10-03
Publication date: 1990-05-16
Also published as: GB8922263D0; DE3936932A1

Description

212-'4869 DIGITAL COMPARATOR TRIGGER SIGNAL Field of the Invention is This

invention pertains to oscilloscopes in general, and, in particular to the trigger mechanism which starts the sweep of the oscilloscope display.

Background of the Invention

Analog and digital oscilloscopes have used trigger generators to synchronize the sweep of an oscilloscope to a repetitive external signal for many years. The trigger signal is generated from the input measured signal and is used to trigger the start of the sweep for displaying the input signal on the CRT screen. With the advent of digital recording devices such as transient recorders, logic analyzers, and digital storage oscilloscopes, the trigger signal has been transformed to be the reference point to stop, or start, the collection of data. The use of the trigger as a stop signal allows the recording and display of data that was present just before the trigger event occurred.

The generation of trigger signals has remained largely the same for digital recording devices as it was for analog scopes. An analog signal is typically conditioned and applied to the input of an analog comparator circuit which compares the signal voltage to a selected analog 1 c voltage level. Transitions through the threshold of the analog comparator give a rising or falling edge output from the comparator that can be used as the trigger signal. The hysteresis (sensitivity) of the comparator circuit can often be adjusted to prevent a false trigger signal generation due to noise on the input measured signal. The hysteresis is accomplished by changing the amount of feedback returning to the analog comparator. Careful analog circuit design is needed in this approach to construct a circuit that can provide the same sensitivity at high frequencies as at low frequencies. One common design strategy is to use one analog comparator circuit in the trigger generator system into which various analog signals would be switched as an input. The circuit uses only one comparator in an attempt to save on costs. This strategy provides the ability to generate a trigger from any one of a multiple of data collection channels or from the external trigger input. The process of conditioning and switching signals from the multiple sources, however, introduces the problem of matching the off-set and gain characteristics of the different signal paths into the comparator. One early approach to providing a digitally programmable trigger level was to substitute a digital register and a digital-to-analog converter for the simple potentiometer normally used as the other input to the trigger signal comparator in the prior art.

Summary of the Invention

The signal from which the trigger is generated is provided to an analog-to-digital converter. The output of the analog-to- digital converter is compared to a digital number stored in a register by a digital comparator. When the digitized value of-the input signal crosses the value stored in the register, a trigger signal is produced.

Trigger sensitivity may be reduced by providing the 1 is digital output of the analog-to-digital converter to a second comparator. The second comparator compares the output of the analog-to-digital converter to a second number stored in a second register. The second number is greater or less than the first number, by an amount reflecting the sensitivity desired. The trigger is generated when the output of the analog-to-digital converter passes the first value and then the second value.

It is an object of the present invention to provide a method for generating digital trigger signals for a digital oscilloscope or similar instrument.

It is another object of the present invention to provide a digital trigger signal generator that allows for the trigger value and the noise sensitivity to be independently set.

Other objects, advantages and features of the present invention will become apparent from the following specification when taken in conjunction with the accompanying drawings.

Brief Description of the Drawings

Fig. 1 shows a simplified block diagram of a digital comparator circuit.

Fig. 2 shows a simplified block diagram of a typical acquisition channel.

Fig. 3 shows a simplified block diagram of a plurality of acquisition channels.

Detailed Description

Shown in schematic fashion in Fig. 1 is an embodiment of a digital comparator trigger system constructed in accordance with the present invention. The input signal from which the trigger is to be generated is supplied as an input signal to a signal conditioner 102 the output of is which is connected as an input to analog-to-digital converter 104. The digital output data stream of analog-to-digital converter 104 is provided as a first input to digital comparator 106. The output of a digital register 108 is connected as the second input to the digital comparator 106. The number stored in the digital register 108 is provided to it by a microprocessor 110, which is programmed to be responsive to a user selected trigger lever that may be changed before any given measurement. The output of the digital comparator 106 is connected to the actual trigger signal generator 112, which also receives an input from the microprocessor 110.

In its operation, the input signal is provided first to the signal conditioner 102 to filter and/or match the voltage off-set of the input signal as appropriate. The output analog signal from the signal conditioner 102 is then digitized by the analog-to-digital convertor 104. This creates a digital value presented to the digital comparator 106 for comparison with the digital value placed in the digital register 108 by the microprocessor 110. The digital comparator 106 is capable of giving three output signals, i.e. less than, greater than, or equal to, in comparing its two input digital values. The trigger signal generator 112 is then instructed by the microprocessor 110 as to when, based on those three input lines, to generate the actual trigger signal.

Thus the trigger signal generator 112 can be programmed to operate as the input signal goes from less-than to greater-than the value in the digital comparator 106, or the reverse, depending on whether rising edge or falling edge triggering is desired. If the output of the digital comparator 106 is considered only as having a two-state output (greaterthan and not-greater-than) it is readily apparent that the sensitivity of the trigger is fixed at the value of the voltage value of the least significant bit of the digital values compared by the digital comparator 106. Thus 11 1 sensitivity, including noise sensitivity, can be reduced by changing the number of bits considered by the digital comparator 106.

However, digital comparators, unlike analog comparators, can detect three conditions. The analog-to-digital converter 104 output can be greater than, equal to, or less than the number stored in the digital register 108. If a valid trigger condition is redefined as the first input passing from a value less than the second input to a value greater than the second input (for positive slope triggering) the trigger noise sensitivity can be reduced by a factor of two. If even more noise tolerance is needed (less sensitivity) the lower bits or bit of the digital values being compared may be masked from the comparison.

The method of changing the sensitivity by masking the lower significant bits has the disadvantage of limiting the resolution of the trigger level. For example, in a four-bit digital system, where binary number 0110 is the trigger level, by not masking any of the four-bits, the trigger will be generated when the input value passes from less than or equal to 6 to greater than 6. If the least significant bit is masked the digital numbers 0110 and 0111 are equal in value. Thus no trigger value can be selected at the transition from equal to 6 to greater than 6 (equal to 7). Rather this requires that the first input pass from less than or equal to 6 to-greater than 7. This increases the noise tolerance (decreases the sensitivity) and decreases the resolution by a factor of 2. By masking the least two significant bits values from 4 to 7 are all equal to the comparator word 01XX where X signifies either a 0 or a 1. In this case the sensitivity decreases by a factor of 4. In general, the sensitivity may be reduced by a factor of 2 n where n equals the number of bits n masked. Note that the resolution is also reduced by 2 By using a second digital comparator and second digital register, it is possible to decrease the 9 k t -6 sensitivity without decreasing the resolution. With two digital. comparators, the input voltage may be digitally compared to first and second voltage levels. A trigger signal is then generated when the signal first crosses the first value and then crosses the second value. This allows the system to select a trigger level and a sensitivity each having a resolution of one least significant bit. It is also possible using two digital comparators and digital registers to provide a sensitivity that is not a power of 2. Using the two comparators and two registers it would be possible to select a trigger level of one value and a sensitivity of a second value, both with a resolution equal to the value of the least significant digital bit. This would not be possible using a single comparator and a single register.

Fig. 2 shows an example of a two comparator trigger generator. The input signal is processed by a signal conditioner 202 and then converted to a digital signal by analog-to-digital convertor 202. The output of the digital to analog converter 204 is provided as a first input to each of a pair of digital comparators 206 and 207. A microprocessor 210 provides numbers based on user selected trigger parameters to digital registers 208 and 209. The digital comparator 206 is provided with the output of digital register 208 as its second input and the digital comparator 207 is provided with the output of digital register 207 as its second input. The values in the digital registers 208 and 209 are chosen by the microprocessor 210 to bracket the digital value of the selected trigger level and to be separated by the desired level of noise sensitivity. When the first input for each digital comparator 206 or 207 changes from less than the second input to greater than or equal to the second input, the digital comparator provides a signal to a trigger signal generator 212. The trigger signal generator 212 generates a trigger upon receiving a signal from one of the digital comparators after a corresponding signal has 11 1 k already been received from the other digital comparator.

Thus for a positive slope trigger, if the value in digital register 208 is higher than in digital register 209, the trigger signal generator 212 would be controlled by the microprocessor 210 to generate a trigger signal when a greater-than signal from comparator 206 follows a greater-than signal from comparator 207. A negative slope trigger may be provided by requiring a less-than signal from digital comparator 206 to be received first, followed by a less-than signal from comparator 207. A data acquisition memory 214 is connected to receive data from the analog-to-digital converter 204 under the control of the microprocessor 210. The acquisition memory 214 receives and stores a continuous data stream that may be is displayed as a captured data stream upon a trigger signal. Such a triggered data stream capture is used to examine data just prior to a triggering event.

It is easy to use the present invention with an oscilloscope having multiple channels. Each acquisition channel, 301-304 of Figure 3, each including a trigger generator circuit similar to Figs. 1 or 2, generates a trigger signal based upon the analog signal applied to that individual channel. The slope and trigger level are individually controlled for each channel. Optional external trigger generator 306 is used in the typical fashion. This provides a means of system synchronization independent of the analog-to-digital conversion digitizing rates. Master trigger generator 307 uses digital multiplexers to generate the system trigger signal. This block could also be programmed to provide logical combinations of trigger conditions to produce the trigger. An additional option available is for any channel to use its own channel trigger to control the acquiring of data for that channel or any other channel in the system. The signal conditioner portion of the acquisition channel is simplified with the addition of the digital comparators. Normally a buffer circuit is needed to isolate the analog to digital converter from the analog trigger comparators. This buffer often was required to send the analog signal to a physically separate portion of the system. Having trigger comparators on each channel offers the possibility of each channel operating independent from the overall system.

It should be noted that the particular embodiment of the invention, which is shown and described herein, is intended as merely illustrative and not as restrictive of the invention.

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Claims

1. An apparatus to generate a trigger used to synchronize the sweep of an oscilloscope comprising: a digital-to-analog converter having as an input the analog signal from which the trigger signal is to be generated, and a digital output having a magnitude corresponding to the magnitude of the analog input; a first register to store a digital signal corresponding to the magnitude of the desired trigger level; a comparator connected to receive as a first input the output of the digital-to-analog converter and further connected to receive as a second input the output of the first register, wherein the comparator 'has an output having a first state when the first input is less than the second input, a second state when the first input is equal to the second input, and a third state when the first input is greater than the second input; a trigger generator having a trigger input the output of the comparator wherein the trigger-generator generates a trigger when the trigger input changes from a first preselected value to a second preselected value, where the first and second preselected values are chosen from a group consisting of: the first state, the second state, and the third state.

2. The apparatus of. Claim 1 wherein the first preselected value is the first state, and the second preselected value is the third state.

3. The apparatus of Claim 1 wherein the comparator compares a number of bits that is less than the number of bits of the first input and wherein the bits not compared are less significant than the bits compared.' 1

4. An apparatus to generate a trigger signal used to trigger the synchronized sweep of an oscilloscope comprising: an analog-to-digital converter having as an input the signal from which the trigger is to be generated and providing an output wherein the output is a digital signal having a magnitude which corresponds to the magnitude of the analog input signal; a first register to store a first binary number; a second register to store a second binary number; wherein the first and second binary numbers are dependent on the desired trigger level and the desired sensitivity; a first comparator connected to receive as a first input the output of the analog-to-digital converter, is and connected to receive as a second input the output of the first register, and wherein the first comparator has an output having a first state when the first input is less than the second input, and a second state otherwise; a second comparator connected to receive as a first input the output of the analog-to-digital converter, and connected to receive as a second input the output of the second register, wherein the second comparator has an output having a third state when the first input has a magnitude less than the magnitude of the second input, and a fourth state when the magnitude of the first input is greater than or equal to the magnitude of the second input; a trigger generator connected to receive as a first trigger input the output of the first comparator and connected to receive as a second trigger input the output of the second comparator, wherein a trigger is produced when the second trigger input changes from a third preselected value to a fourth preselected value after the first trigger input has changed from a first preselected value to a second preselected value.

5. The apparatus according to Claim 4 wherein the first preselected value is the first state, the second preselected value is the second state, the third preselected value is the third state, and the fourth preselected value is the fourth state.

6. The apparatus according to Claim 4 wherein there is an acquistion memory receiving data continuously from the analog-to-digital converter so that the data therein can be accessed after a trigger is generated.

7. An apparatus to generate a trigger signal used to synchronise the sweep of an oscilloscope constructed and arranged to operate substantially as hereinbefore described with reference to and as illustrated in the accompanying drawings.

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