GB2202351A - Plural bit-width microprocessor system - Google Patents

Plural bit-width microprocessor system Download PDF

Info

Publication number
GB2202351A
GB2202351A GB08806257A GB8806257A GB2202351A GB 2202351 A GB2202351 A GB 2202351A GB 08806257 A GB08806257 A GB 08806257A GB 8806257 A GB8806257 A GB 8806257A GB 2202351 A GB2202351 A GB 2202351A
Authority
GB
United Kingdom
Prior art keywords
control
input
output
block
data bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
GB08806257A
Other languages
English (en)
Other versions
GB8806257D0 (en
Inventor
Hristo Alexandrov Turlakov
Venelin Georgiev Barbutov
Dobrin Georgiev Borshukov
Irena Georgieva Hristova
Nikolay Kirilov Kokalitchev
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CIITT
Original Assignee
CIITT
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CIITT filed Critical CIITT
Publication of GB8806257D0 publication Critical patent/GB8806257D0/en
Publication of GB2202351A publication Critical patent/GB2202351A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4009—Coupling between buses with data restructuring
    • G06F13/4018—Coupling between buses with data restructuring with data-width conversion

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Communication Control (AREA)
GB08806257A 1987-03-19 1988-03-16 Plural bit-width microprocessor system Pending GB2202351A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
BG8778956A BG45007A1 (forum.php) 1987-03-19 1987-03-19

Publications (2)

Publication Number Publication Date
GB8806257D0 GB8806257D0 (en) 1988-04-13
GB2202351A true GB2202351A (en) 1988-09-21

Family

ID=3918722

Family Applications (1)

Application Number Title Priority Date Filing Date
GB08806257A Pending GB2202351A (en) 1987-03-19 1988-03-16 Plural bit-width microprocessor system

Country Status (6)

Country Link
JP (1) JPS6426262A (forum.php)
BG (1) BG45007A1 (forum.php)
DD (1) DD289678A7 (forum.php)
DE (1) DE3809234A1 (forum.php)
GB (1) GB2202351A (forum.php)
IT (1) IT1219875B (forum.php)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3900348A1 (de) * 1989-01-07 1990-07-12 Diehl Gmbh & Co Universelles bus-system
GB2246223B (en) * 1990-07-20 1994-08-03 Mitsubishi Electric Corp DMA control device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0189523A2 (en) * 1985-01-31 1986-08-06 Kabushiki Kaisha Toshiba Microprocessor system
EP0189638A1 (en) * 1984-12-10 1986-08-06 Ing. C. Olivetti & C., S.p.A. Bus width adapter
GB2171230A (en) * 1985-02-14 1986-08-20 Dso Isot Using 8-bit and 16-bit modules in a 16-bit microprocessor system
EP0194696A2 (en) * 1985-03-15 1986-09-17 Sony Corporation Multi processor system
GB2184574A (en) * 1984-05-08 1987-06-24 Dso Isot Using 8-bit modules in a 16-bit microprocessor system

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4109310A (en) * 1973-08-06 1978-08-22 Xerox Corporation Variable field length addressing system having data byte interchange
GB2021823B (en) * 1978-05-30 1983-04-27 Intel Corp Data transfer system

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2184574A (en) * 1984-05-08 1987-06-24 Dso Isot Using 8-bit modules in a 16-bit microprocessor system
EP0189638A1 (en) * 1984-12-10 1986-08-06 Ing. C. Olivetti & C., S.p.A. Bus width adapter
EP0189523A2 (en) * 1985-01-31 1986-08-06 Kabushiki Kaisha Toshiba Microprocessor system
GB2171230A (en) * 1985-02-14 1986-08-20 Dso Isot Using 8-bit and 16-bit modules in a 16-bit microprocessor system
EP0194696A2 (en) * 1985-03-15 1986-09-17 Sony Corporation Multi processor system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3900348A1 (de) * 1989-01-07 1990-07-12 Diehl Gmbh & Co Universelles bus-system
FR2641630A1 (fr) * 1989-01-07 1990-07-13 Diehl Gmbh & Co Systeme de bus universel
GB2246223B (en) * 1990-07-20 1994-08-03 Mitsubishi Electric Corp DMA control device
US5499383A (en) * 1990-07-20 1996-03-12 Mitsubishi Denki Kabushiki Kaisha DMA control device controlling sequential storage of data

Also Published As

Publication number Publication date
IT1219875B (it) 1990-05-24
IT8847747A0 (it) 1988-03-18
JPS6426262A (en) 1989-01-27
BG45007A1 (forum.php) 1989-03-15
DE3809234A1 (de) 1988-10-06
DD289678A7 (de) 1991-05-08
GB8806257D0 (en) 1988-04-13

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