GB2057195A - Multilayer circuit structure - Google Patents

Multilayer circuit structure Download PDF

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Publication number
GB2057195A
GB2057195A GB8026232A GB8026232A GB2057195A GB 2057195 A GB2057195 A GB 2057195A GB 8026232 A GB8026232 A GB 8026232A GB 8026232 A GB8026232 A GB 8026232A GB 2057195 A GB2057195 A GB 2057195A
Authority
GB
United Kingdom
Prior art keywords
conductors
spheres
circuit boards
holes
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB8026232A
Other versions
GB2057195B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Services Ltd
Original Assignee
Fujitsu Services Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
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Publication of GB2057195A publication Critical patent/GB2057195A/en
Application granted granted Critical
Publication of GB2057195B publication Critical patent/GB2057195B/en
Expired legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/462Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar double-sided circuit boards
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R12/00Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
    • H01R12/50Fixed connections
    • H01R12/51Fixed connections for rigid printed circuits or like structures
    • H01R12/52Fixed connections for rigid printed circuits or like structures connecting to other rigid printed circuits or like structures
    • H01R12/523Fixed connections for rigid printed circuits or like structures connecting to other rigid printed circuits or like structures by an interconnection through aligned holes in the boards or multilayer board
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/368Assembling printed circuits with other printed circuits parallel to each other
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0302Properties and characteristics in general
    • H05K2201/0305Solder used for other purposes than connections between PCB or components, e.g. for filling vias or for programmable patterns
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09536Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/096Vertically aligned vias, holes or stacked vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10234Metallic balls
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10378Interposers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06Lamination
    • H05K2203/063Lamination of preperforated insulating layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4046Through-connections; Vertical interconnect access [VIA] connections using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards

Abstract

A multilayer circuit structure in which interconnections between conductors 2 of the different layers 1 are provided by conductive links, which are soldered to the conductors 2. Each link consists of one or more solder coated conductive spheres 5 located in apertures 6 in dielectric separators 3 interleaved with the circuit layers 1. The spheres 5 may be arranged to engage through-plated holes 4 linking conductors 2 on opposite sides of the layers 1 and thus the conductive links in conjunction with the through-plated holes 4 form interconnections extending through the structure. The spheres 5 may also be soldered directly on to the flat surface of a conductor or, alternatively, an indentation or a hole through the conductors may be provided to engage the spheres 5. <IMAGE>

Description

SPECIFICATION Improvements in or relating to multilayer circuit structures The present invention relates to multilayer circuit structures and in particular to the provision of interconnections between circuits of the different layers.
Such circuit structures usually comprise a stack of printed circuit boards which may be single or double sided. Conductive pads are provided on the circuit boards at points in the circuits which require to be interconnected. The pads are aligned within the multilayer stack and interconnections are formed by drilling the stack through the pads and plating the inner walls of the holes. However, using this technique the density of the interconnections is limited by the size of the pads which in turn have to be of sufficient size to take a drill which produces a hole large enough to enable reliable plating through the holes. Another disadvantage with this technique is that the circuit structure can only be tested when it is complete and thus if a fault is present on one of the inner circuit boards of the stack the whole structure may have to be scrapped.
It has previously been proposed to utilize conductive links to provide the interconnections. In this case plated hour-glass shaped holes are formed through the boards at the pad locations and the links, which may be conductive spheres, are located at the tapered portions. The holes and the spheres are dimensioned such that when the spheres are inserted in opposite ends of a hole they contact one another in the centre. Thus, a multilayer structure can be built up in which interconnections are formed by columns of spheres all contacting one another. Finally the spheres are welded to one another and to the sides of the holes by applying welding contacts to the outermost spheres.A disadvantage with this method however is that in cases where the interconnections do not extend right through the stack there is no access for the welding contacts and thus the circuit structure has to be constructed as a number of sub assemblies to allow such access. Furthermore, when welding a column of spheres in series the spheres tend to deform and it is therefore difficult to control the reliability of the interconnection. A further disadvantage of this method is that, due to their shape, the holes are difficult and thus expensive to form. In addition the dimensions of the holes and the spheres are critical in order to ensure that the spheres inserted in opposite ends of a hole contact both one another and the sides of the hole.
According to the present invention a method of producing a multilayer circuit structure in which at least two circuit boards are superimposed, the circuit boards having conductors on at least their respective facing surfaces which require to be interconnected, includes providing a coating of solder on the conductors; providing a dielectric separator between the circuit boards, the separator having apertures respectively aligned with those positions on the conductors which are required to be interconnected; providing a conductive link consisting of one or more solder coated conductive spheres in each aperture of the separator, the conductive link engaging the conductors on the respective circuit boards; applying pressure to the structure to urge the circuit boards towards one another while heating the structure to melt the solder coatings on the spheres and the conductors; and cooling the structure to thereby cause the conductive links to be soldered to the conductors to provide interconnections between conductors of the respective circuit boards.
Apparatus embodying the present invention will now be described, by way of example, with reference to the accompanying drawings, in which.
Figure 1 is a sectional view of a multilayer circuit structure in which conductive spheres are utilized to provide connections between the layers, Figure 2 is a sectional view through one of the interconnections prior to soldering, Figure 3 is a sectional view through the interconnection of Figure 2 after soldering, Figure 4 is a sectional view showing a single interconnection provided by three spheres, and Figure 5A, 5B and 5C are sectional views showing further embodiments of the invention.
Referring now to Figure 1 of the drawings, a multilayer circuit structure comprises double sided printed circuit boards 1 carrying conductive tracks (not shown) and conductive pads 2. Dielectric separators 3 are interleaved with the printed circuit boards 1. Through-plated holes 4 are provided in the circuit boards to electrically connect the opposed pads 2 on opposite sides of the boards 1.
Copper spheres 5 are located in holes 6 formed in the dielectric separators in positions aligned with the through-plated holes 4. The copper spheres 5 are soldered to the corresponding pads 2 of adjacent circuit boards to provide interconnections therebetween.
The construction and assembly of the multilayer circuit structure will now be described in more detail with reference to Figures 1 and 2 of the drawings. The double sided printed circuit boards 1 are conventional boards having conductive tracks on both sides and opposed conductive pads 2 at locations where interconnections are required both between conductive tracks on opposite sides of the boards and between conductive tracks on different boards. Electrically conductive through-plated connections 4 link opposed pairs of pads 2. The circuit boards 1 are prepared from double sided copper clad laminates in which the through-plated connections 4 are formed first by drilling the individual boards at the required locations and plating the walls of the drilled holes. The boards are then etched to form the conductive tracks and the conductive pads 2 around the through connections.A layer of solder 7 is deposited on the plated walls of the holes and on at least that part of the pads surrounding the holes. At this stage the printed circuit boards can be individually tested.
After testing, the circuit boards 1 are sprayed with flux and lightly baked to remove the solvents from the flux. A dielectric separator 3 is then placed on to each board 1 with the holes 6 aligned with the through-plated holes 4 inthe circuit board. The holes 6 are largerthan the through-plated holes 4 and are each dimensioned to receive a copper sphere 5 having a layer of solder 7 deposited thereon. The spheres are constrained by the dielectric separator 3 so that they engage the rims of the through-plated holes 4 in the pads 2 with part of their peripheries extending into the holes 4. The thickness of the dielectric separator 3 is less than the diameter of the spheres 5 so that the spheres project above the separator 3.
The circuit boards 1 together with their respective dielectric separators 3 and their respective spheres are now assembled into a stack, the projecting parts of the spheres 5 engaging the rims of corresponding through-plated holes in the undersides of the overlying circuit boards as shown in the figures. A jig may be used to facilitate this operation. Such a jig would have means for accurately aligning all the laminations of the stack, such as, for example, dowel pins for engagement with holes in the laminations. In addition the jig may also be arranged to provide a vacuum beneath the laminations to draw them firmly down on to a base.
A weight is placed on the top of the stack and, after removal of the vacuum the assembled stack in the jig is placed into an oven and its temperature raised quickly to approximately 20"C above the melting point of the solder used. This causes the solder layers 7 on the spheres 5 and the through holes 4 to reflow and thus the spheres are soldered to the pads 2 to form permanent joints therebetween. It will be realised that as the solder on the spheres and the pads and in the through holes reflows, the boards of the stack will move towards one another until, in an ideal condition, the base metal of the spheres 5 engage the base metal at the rims of the through holes 4. In practice, due to manufacturing tolerances of the various components of the assembly, such engagement of the base metals will not necessarily occur.However, the solder layers on the spheres and the pads provide adequate solder at the interfaces of the joints to bond the spheres to the pads.
Figures 2 and 3 respectively show the relative dispositions of the sphere, the separator and the circuit boards at one of the interconnections before and after the soldering process. Due to the compression of the stack the molten solder will be displaced both into the through-plated holes and into the holes in the dielectric separators and will be distributed approximately as shown in Figure 3. It has been found advantageous to subject the assembly to a gentle vibration during the solder reflow operation. The vibration assists the compression of the stack and improves the solder reflow.It will be noted that the dielectric spacer 3 is now trapped between the circuit boards 1 and after the solder has cooled and solidified the assembly is primarily bonded together by the soldered interconnections but is also bonded by the adhesion of the fluxed surfaces of the circuit boards to the dielectric separators at those positions where conductive tracks or pads exist.
In order to ensure that the dielectric separators are trapped between the circuit boards it is essential to control the manufacturing tolerances of the separators and the diameter of the spheres without the solder layer. The alignment of corresponding through holes throughout the stack should also be controlled.
After soldering, the assembly may be vacuum impregnated to fill any cavities between tracks and pads which may exist or simply sealed by a suitable sealant.
It has been found preferable to use a solder having a relatively high melting temperature, for example in the order of 200-C, to allow the subsequent attachment of components to the assembly by a lower melting point solder. Two such solders found to be suitable have melting temperatures of 224 > C and 1 85-C respectively.
It will be realised that the printed circuit boards may be rigid in form or, if manufactured from a thin layer of a material such as polyimide, for example, may be flexible. In cases where the circuit boards are flexible it is desirable to use a rigid dielectric separator such as a ceramic.
The circuit boards themselves may be made from a ceramic, such as alumina for example, carrying thick or thin films on both sides. However, because of the rigidity of the alumina base it is essential in this case to ensure a high degree of flatness of the interfacing surfaces.
Figure 4 shows the use of three spheres in an application where a thicker dielectric separator is required.
Such a thicker separator may be required, for example, to achieve a certain impedance between conductors on adjacent circuit boards. It will be realised that, by using a number of smaller spheres instead of one large sphere, the density of the interconnections or of the conductive tracks may be improved. It may also be advantageous to use one standard size sphere instead of a number of different sizes.
Although the embodiment described utilises double sided circuit boards with through-plated holes it will be realised that the invention is not limited in its application solely to this arrangement. For example, as shown in Figure 5A, the technique can be adapted to provide interconnections between corresponding pads or tracks carried on a pair of single sided circuit boards in face-to-face relationship and separated by a dielectric spacer as before. In this case unplated holes 8 are formed through the pads or tracks which are solder coated as before. Thus the spheres are soldered to the pads or tracks around the rims of the holes. In a further embodiment, shown in Figure 5B, indentations 9 are formed to receive the spheres and such indentations assist in the provision of strong joints. Finally the holes or indentations can be dispensed with altogether as shown in Figure 5C, and in this case the spheres are located solely by the holes in the dielectric separator and simply soldered onto the flat undrilled conductors or pads.
The aforementioned method of multilayer circuit construction has been found suitable for structures of widely differing sizes. For example, typical component dimensions for one type of circuit structure are as follows: Circuit board thickness (epoxy glass) 0.008" Dielectric separator thickness 0.010" Pad diameter 0.025" Diameter of hole in circuit board 0.0138" Diameter of hole in dielectric separator 0.0236" Diameter of sphere 0.0177" Solder thickness on sphere 0.001" Solder thickness on through hole and pad 0.001" Typical component dimensions of a smaller multilayer microcircuit are as follows:: Circuit board thickness (polyimide) 0.001" Dielectric separator thickness 0.004" Pad diameter 0.005" Diameter of hole in circuit board 0.003" Diameter of hole in dielectric separator 0.007" Diameter of sphere 0.005" Solder thickness on sphere 0.0005" Solder thickness on through hole and pad 0.0005" It will be realised that the described circuit structure and its method of manufacture provide some significant advantages over the prior art arrangements. Among these advantages are greater conductor density achieved because the through holes and thus the conductive pads can be smaller, and the ability to test individual circuit boards before assembly into a stack. Furthermore the present arrangement eliminates some of the more difficult operations such as the drilling and plating of holes passing through the complete stack.
In cases where connections are not required to be made to each layer of the stack, the holes only need to be provided in those layers through which the connection extends and thus holes do not have to be provided in layers beyond the required connection. Hence, on those layers space is not wasted by the need to have holes extending right through the stack as in the conventional multilayer structure with through holes formed after the boards are stacked.

Claims (8)

1. A method of producing a multilayer circuit structure in which at least two circuit boards are superimposed, the circuit boards having conductors on at least their respective facing surfaces which require to be interconnected, the method including; providing a coating of solder on the conductors; providing a dielectric separator between the circuit boards, the separator having apertures respectively aligned with those positions on the conductors which are required to be interconnected; providing a conductive link consisting of one or more solder coated conductive spheres in each aperture of the separator, the conductive link engaging the conductors on the respective circuit boards; applying pressure to the structure to urge the circuit boards towards one another while heating the structure to melt the solder coatings on the spheres and the conductors; and cooling the structure to thereby cause the conductive links to be soldered to the conductors to provide interconnections between conductors of the respective circuit boards.
2. A method as claimed in Claim 1, including the further step of forming indentations in the conductors prior to providing said coating of solder, the indentations being positioned to engage said conductive links.
3. A method as claimed in Claim 1, including the further step of forming holes in the conductors prior to providing said coating of solder, the holes being of smaller diameter than the spheres forming the conductive links and being positioned to engage said conductive links.
4. A method as claimed in Claim 3, including the further steps of extending at least some of the holes in the conductors right through the circuit boards and through further conductors on the opposite sides of the boards; through-plating the holes to provide electrically conductive connections between conductors on opposite sides of the circuit boards, and forming a stack of superimposed circuit boards interleaved with dielectric separators locating conductive links, the conductive links in conjunction with the through-plated holes forming interconnections linking the conductors in the stack.
5. A method as claimed in any preceding claim, in which the spheres are formed from copper.
6. A method as claimed in any preceding claim, in which the solder coating the spheres and the conductors has a relatively high melting point.
7. A multilayer circuit structure manufactured in accordance with the method of Claims 1-6.
8. A method of producing a multilayer circuit structure as hereinbefore described with reference to the accompanying drawings.
GB8026232A 1979-08-18 1980-08-12 Multilayer circuit structure Expired GB2057195B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB7928829 1979-08-18

Publications (2)

Publication Number Publication Date
GB2057195A true GB2057195A (en) 1981-03-25
GB2057195B GB2057195B (en) 1983-03-30

Family

ID=10507298

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8026232A Expired GB2057195B (en) 1979-08-18 1980-08-12 Multilayer circuit structure

Country Status (4)

Country Link
AU (1) AU533901B2 (en)
FR (1) FR2464010A1 (en)
GB (1) GB2057195B (en)
ZA (1) ZA804558B (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1985005529A1 (en) * 1984-05-23 1985-12-05 Mta Központi Fizikai Kutató Intézete Process and arrangement to increase the reliability of the metallization of borings in the production of multilayer printed circuits
US5058800A (en) * 1988-05-30 1991-10-22 Canon Kabushiki Kaisha Method of making electric circuit device
WO2004004434A1 (en) * 2002-06-27 2004-01-08 Raytheon Company Multilayer stripline radio frequency circuits and interconnection methods
EP2288243A1 (en) * 2009-08-20 2011-02-23 SEMIKRON Elektronik GmbH & Co. KG Method for producing an electrical connection between circuit boards
WO2014025298A1 (en) 2012-08-10 2014-02-13 Telefonaktiebolaget L M Ericsson (Publ) A printed circuit board arrangement and a method for forming electrical connection at a printed circuit board

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH023631Y2 (en) * 1984-12-28 1990-01-29
FR2669500B1 (en) * 1990-11-16 1996-06-14 Commissariat Energie Atomique HYBRID CIRCUIT FORMED BY TWO CIRCUITS WHOSE TRACKS ARE CONNECTED BY ELECTRICAL CONNECTION BALLS
US10999938B1 (en) * 2020-04-29 2021-05-04 Raytheon Company Method of wire bonding a first and second circuit card

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3541222A (en) * 1969-01-13 1970-11-17 Bunker Ramo Connector screen for interconnecting adjacent surfaces of laminar circuits and method of making
DE1919567A1 (en) * 1969-04-17 1970-11-05 Siemens Ag Detachable electrical connections between micro-assemblies and / or wiring boards
US3616532A (en) * 1970-02-02 1971-11-02 Sperry Rand Corp Multilayer printed circuit electrical interconnection device
FR2080693B3 (en) * 1970-02-23 1973-05-11 Keramische K Veb

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1985005529A1 (en) * 1984-05-23 1985-12-05 Mta Központi Fizikai Kutató Intézete Process and arrangement to increase the reliability of the metallization of borings in the production of multilayer printed circuits
US5058800A (en) * 1988-05-30 1991-10-22 Canon Kabushiki Kaisha Method of making electric circuit device
WO2004004434A1 (en) * 2002-06-27 2004-01-08 Raytheon Company Multilayer stripline radio frequency circuits and interconnection methods
US6731189B2 (en) 2002-06-27 2004-05-04 Raytheon Company Multilayer stripline radio frequency circuits and interconnection methods
AU2003233683B2 (en) * 2002-06-27 2006-02-23 Raytheon Company Multilayer stripline radio frequency circuits and interconnection methods
EP2288243A1 (en) * 2009-08-20 2011-02-23 SEMIKRON Elektronik GmbH & Co. KG Method for producing an electrical connection between circuit boards
WO2014025298A1 (en) 2012-08-10 2014-02-13 Telefonaktiebolaget L M Ericsson (Publ) A printed circuit board arrangement and a method for forming electrical connection at a printed circuit board
CN104521332A (en) * 2012-08-10 2015-04-15 瑞典爱立信有限公司 A printed circuit board arrangement and a method for forming electrical connection at a printed circuit board
EP2883430A4 (en) * 2012-08-10 2016-05-11 Ericsson Telefon Ab L M A printed circuit board arrangement and a method for forming electrical connection at a printed circuit board

Also Published As

Publication number Publication date
FR2464010B1 (en) 1984-12-28
AU6148280A (en) 1981-02-26
AU533901B2 (en) 1983-12-15
ZA804558B (en) 1981-09-30
FR2464010A1 (en) 1981-02-27
GB2057195B (en) 1983-03-30

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PCNP Patent ceased through non-payment of renewal fee