GB1588183A - Arrangements for use in addressing mos stores - Google Patents
Arrangements for use in addressing mos stores Download PDFInfo
- Publication number
- GB1588183A GB1588183A GB3806177A GB3806177A GB1588183A GB 1588183 A GB1588183 A GB 1588183A GB 3806177 A GB3806177 A GB 3806177A GB 3806177 A GB3806177 A GB 3806177A GB 1588183 A GB1588183 A GB 1588183A
- Authority
- GB
- United Kingdom
- Prior art keywords
- transistors
- decoder circuit
- stage
- decoder
- outputs
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 210000000352 storage cell Anatomy 0.000 claims description 12
- 239000003990 capacitor Substances 0.000 claims description 4
- 230000008878 coupling Effects 0.000 claims description 4
- 238000010168 coupling process Methods 0.000 claims description 4
- 238000005859 coupling reaction Methods 0.000 claims description 4
- 230000000295 complement effect Effects 0.000 claims description 3
- 238000010276 construction Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
- G11C11/4082—Address Buffers; level conversion circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
- G11C11/4087—Address decoders, e.g. bit - or word line decoders; Multiple line decoders
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/02—Shaping pulses by amplifying
- H03K5/023—Shaping pulses by amplifying using field effect transistors
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Static Random-Access Memory (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE2641524A DE2641524B1 (de) | 1976-09-15 | 1976-09-15 | Anordnung zur Adressierung eines MOS-Speichers |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1588183A true GB1588183A (en) | 1981-04-15 |
Family
ID=5987981
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB3806177A Expired GB1588183A (en) | 1976-09-15 | 1977-09-13 | Arrangements for use in addressing mos stores |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JPS6032279B2 (enrdf_load_stackoverflow) |
| DE (1) | DE2641524B1 (enrdf_load_stackoverflow) |
| FR (1) | FR2365179A1 (enrdf_load_stackoverflow) |
| GB (1) | GB1588183A (enrdf_load_stackoverflow) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2308703A (en) * | 1995-12-29 | 1997-07-02 | Hyundai Electronics Ind | Word line driver in semiconductor memory device |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6413289A (en) * | 1988-05-06 | 1989-01-18 | Nec Corp | Decoder circuit |
| KR101412460B1 (ko) * | 2012-05-21 | 2014-07-01 | 주식회사 뉴핫맥스 | 발열 코일의 처짐 방지 구조를 갖는 히터 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3902082A (en) * | 1974-02-11 | 1975-08-26 | Mostek Corp | Dynamic data input latch and decoder |
-
1976
- 1976-09-15 DE DE2641524A patent/DE2641524B1/de active Granted
-
1977
- 1977-09-08 FR FR7727200A patent/FR2365179A1/fr active Granted
- 1977-09-12 JP JP52109774A patent/JPS6032279B2/ja not_active Expired
- 1977-09-13 GB GB3806177A patent/GB1588183A/en not_active Expired
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2308703A (en) * | 1995-12-29 | 1997-07-02 | Hyundai Electronics Ind | Word line driver in semiconductor memory device |
| GB2308703B (en) * | 1995-12-29 | 2000-07-26 | Hyundai Electronics Ind | Word line driver in semiconductor memory device |
Also Published As
| Publication number | Publication date |
|---|---|
| DE2641524B1 (de) | 1977-11-17 |
| JPS6032279B2 (ja) | 1985-07-26 |
| FR2365179B1 (enrdf_load_stackoverflow) | 1983-05-13 |
| JPS5336147A (en) | 1978-04-04 |
| FR2365179A1 (fr) | 1978-04-14 |
| DE2641524C2 (enrdf_load_stackoverflow) | 1978-07-13 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed | ||
| PE20 | Patent expired after termination of 20 years |
Effective date: 19970912 |