GB1494732A - Odometers - Google Patents

Abstract

1494732 Counting apparatus; odometers; memorizing counts SMITHS INDUSTRIES Ltd 14 March 1975 [14 Dec 1973] 57951/73 Heading G4D An electric odometer comprises a counter 12a-12f counting pulses representing increments of distance travelled and a semi-conductor memory 23a-23f arranged to store the last state of the counter whenever the circuit is unpowered and to reset the counter to said last state when power is restored. The semiconductor memory is in the form of a set of MNOS (metal-nitride-oxide-semi-conductor) transistors (Fig. 2, not shown) capable of storing a charge for several months with or without a power supply. A control circuit 11 produces one output pulse on line 13 (at the rate of 10 per mile) to counter 12 for every four input pulses. During the period of the other three input pulses circuit 11 first produces "write" pulses which cause the state of counter 12 to be read into the memory 23 by applying + 30 v. or - 30 v. pulses to the gate electrodes of the MNOS transistors according to whether the BCD output of the corresponding counter stage is 0 or 1. Then the circuit 11 generates a read and preset pulse which causes the counter to be preset to the value in the memory. The memory transistors are read by applying - 5 v. to the gate electrode. If a charge is stored, indicating a binary 1, then the transistor does not conduct, otherwise it does. The state of counter 12 is displayed at 20 by way of BCD to seven segment or other decoder 17. The pulses may also be supplied to a four decade resettable trip meter.