GB1477511A - Methods of manufacturing semiconductor devices - Google Patents

Methods of manufacturing semiconductor devices

Info

Publication number
GB1477511A
GB1477511A GB2258374A GB2258374A GB1477511A GB 1477511 A GB1477511 A GB 1477511A GB 2258374 A GB2258374 A GB 2258374A GB 2258374 A GB2258374 A GB 2258374A GB 1477511 A GB1477511 A GB 1477511A
Authority
GB
United Kingdom
Prior art keywords
boron
strip
oxide
polysilicon
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2258374A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Philips Components Ltd
Original Assignee
Mullard Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mullard Ltd filed Critical Mullard Ltd
Priority to GB603177A priority Critical patent/GB1477512A/en
Priority to GB2258374A priority patent/GB1477511A/en
Priority to NL7505698A priority patent/NL7505698A/xx
Priority to CA227,266A priority patent/CA1040749A/en
Priority to JP5979875A priority patent/JPS5617826B2/ja
Priority to FR7515787A priority patent/FR2272486B1/fr
Priority to DE19752522448 priority patent/DE2522448A1/de
Priority to US05/761,369 priority patent/US4124933A/en
Publication of GB1477511A publication Critical patent/GB1477511A/en
Priority to US05/963,546 priority patent/US4287660A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/535—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28123—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
    • H01L21/2815—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects part or whole of the electrode is a sidewall spacer or made by a similar technique, e.g. transformation under mask, plating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3215—Doping the layers
    • H01L21/32155—Doping polycristalline - or amorphous silicon layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Weting (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Semiconductor Memories (AREA)
GB2258374A 1974-05-21 1974-05-21 Methods of manufacturing semiconductor devices Expired GB1477511A (en)

Priority Applications (9)

Application Number Priority Date Filing Date Title
GB603177A GB1477512A (en) 1974-05-21 1974-05-21 Methods of manufacturing semiconductor devices
GB2258374A GB1477511A (en) 1974-05-21 1974-05-21 Methods of manufacturing semiconductor devices
NL7505698A NL7505698A (nl) 1974-05-21 1975-05-15 Werkwijze ter vervaardiging van een halfgelei- derinrichting en halfgeleiderinrichting ver- vaardigd volgens deze werkwijze.
CA227,266A CA1040749A (en) 1974-05-21 1975-05-15 Method of manufacturing fine line conductors on semiconductors
JP5979875A JPS5617826B2 (de) 1974-05-21 1975-05-21
FR7515787A FR2272486B1 (de) 1974-05-21 1975-05-21
DE19752522448 DE2522448A1 (de) 1974-05-21 1975-05-21 Verfahren zur herstellung einer halbleiteranordnung und durch dieses verfahren hergestellte halbleiteranordnung
US05/761,369 US4124933A (en) 1974-05-21 1977-01-21 Methods of manufacturing semiconductor devices
US05/963,546 US4287660A (en) 1974-05-21 1978-11-24 Methods of manufacturing semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB2258374A GB1477511A (en) 1974-05-21 1974-05-21 Methods of manufacturing semiconductor devices

Publications (1)

Publication Number Publication Date
GB1477511A true GB1477511A (en) 1977-06-22

Family

ID=10181779

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2258374A Expired GB1477511A (en) 1974-05-21 1974-05-21 Methods of manufacturing semiconductor devices

Country Status (6)

Country Link
JP (1) JPS5617826B2 (de)
CA (1) CA1040749A (de)
DE (1) DE2522448A1 (de)
FR (1) FR2272486B1 (de)
GB (1) GB1477511A (de)
NL (1) NL7505698A (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111665669A (zh) * 2015-01-08 2020-09-15 群创光电股份有限公司 显示面板

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4013489A (en) * 1976-02-10 1977-03-22 Intel Corporation Process for forming a low resistance interconnect in MOS N-channel silicon gate integrated circuit
JPS598855Y2 (ja) * 1978-09-01 1984-03-19 大阪電気株式会社 ワイヤ送給装置
JPS5546570A (en) * 1978-09-30 1980-04-01 Chiyou Lsi Gijutsu Kenkyu Kumiai Method of fabricating mos semiconductor device
US4298402A (en) * 1980-02-04 1981-11-03 Fairchild Camera & Instrument Corp. Method of fabricating self-aligned lateral bipolar transistor utilizing special masking techniques
JPS6070401U (ja) * 1983-10-24 1985-05-18 株式会社月星製作所 車輪用スポ−ク

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5542501B2 (de) * 1974-01-29 1980-10-31

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111665669A (zh) * 2015-01-08 2020-09-15 群创光电股份有限公司 显示面板

Also Published As

Publication number Publication date
FR2272486A1 (de) 1975-12-19
DE2522448A1 (de) 1975-12-04
FR2272486B1 (de) 1979-01-19
JPS5617826B2 (de) 1981-04-24
NL7505698A (nl) 1975-11-25
CA1040749A (en) 1978-10-17
JPS51282A (de) 1976-01-05

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
732 Registration of transactions, instruments or events in the register (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee