GB1427527A - Digital to analogue converters - Google Patents
Digital to analogue convertersInfo
- Publication number
- GB1427527A GB1427527A GB528473A GB528473A GB1427527A GB 1427527 A GB1427527 A GB 1427527A GB 528473 A GB528473 A GB 528473A GB 528473 A GB528473 A GB 528473A GB 1427527 A GB1427527 A GB 1427527A
- Authority
- GB
- United Kingdom
- Prior art keywords
- word
- digital
- pulses
- clockpulses
- line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/08—Continuously compensating for, or preventing, undesired influence of physical parameters of noise
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
1427527 Digital to analogue conversion SOLARTRON ELECTRONIC GROUP Ltd 29 Jan 1974 [2 Feb 1973] 5284/73 Headings H3H H13D H14B H14D H14E H3C H3D H3F H3G H6A H6B H6D H6E H6F H6H H7B H7F H7G H8B H8D H8X and HBC In a digital to analogue converter, input words are sequentially applied to AND gates 36a, 36b, 36c and 36d which also receive clockpulses of predetermined durations so as to produce on line 59 respective trains of pulses controlling a switch 62 so that a reference voltage 64 is integrated at 68 for the total duration of the pulses for each word, the resulting amplitude being sampled and held in a store 76A, 76B, 76C or 76D respective to the word. As shown, the input words are from a frequency response analyzer 12. Each word is in binary coded decimal decade-serial bit-parallel form and 4 such words can be accommodated in shift register 20 which has a recirculating loop 28, 16 for continual updating of the stores 76A-76D to prevent output droop. The clockpulses appear cyclically on lines 55a, 55b, 55c and 55d and may be of durations 1, 2, 4, 8, 10, 20, 40, 80 &c. Ásec., Fig. 2 (not shown), to give BCD weighted pulses on line 59. Alternatively 1, 2, 2, 4 code may be used. 60 is an optional isolating transformer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB528473A GB1427527A (en) | 1973-02-02 | 1973-02-02 | Digital to analogue converters |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB528473A GB1427527A (en) | 1973-02-02 | 1973-02-02 | Digital to analogue converters |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1427527A true GB1427527A (en) | 1976-03-10 |
Family
ID=9793221
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB528473A Expired GB1427527A (en) | 1973-02-02 | 1973-02-02 | Digital to analogue converters |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB1427527A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2460566A1 (en) * | 1979-07-03 | 1981-01-23 | Thomson Brandt | Continuous voltage synthesiser for TV receiver - has memory supplying, via A=D converter, binary signals identifying desired output voltages to output switches |
CN116473662A (en) * | 2023-04-18 | 2023-07-25 | 上海玮启医疗器械有限公司 | Pulse ablation impedance detection method based on FPGA |
-
1973
- 1973-02-02 GB GB528473A patent/GB1427527A/en not_active Expired
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2460566A1 (en) * | 1979-07-03 | 1981-01-23 | Thomson Brandt | Continuous voltage synthesiser for TV receiver - has memory supplying, via A=D converter, binary signals identifying desired output voltages to output switches |
CN116473662A (en) * | 2023-04-18 | 2023-07-25 | 上海玮启医疗器械有限公司 | Pulse ablation impedance detection method based on FPGA |
CN116473662B (en) * | 2023-04-18 | 2024-04-09 | 上海玮启医疗器械有限公司 | Pulse ablation impedance detection method based on FPGA |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PCNP | Patent ceased through non-payment of renewal fee |