GB1410083A - Arithmetic logic unit - Google Patents
Arithmetic logic unitInfo
- Publication number
- GB1410083A GB1410083A GB827675A GB827675A GB1410083A GB 1410083 A GB1410083 A GB 1410083A GB 827675 A GB827675 A GB 827675A GB 827675 A GB827675 A GB 827675A GB 1410083 A GB1410083 A GB 1410083A
- Authority
- GB
- United Kingdom
- Prior art keywords
- carry
- aug
- logic unit
- arithmetic logic
- arithmetic unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
- G06F2207/3804—Details
- G06F2207/386—Special constructional features
- G06F2207/3872—Precharge of output to prevent leakage
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Computing Systems (AREA)
- Mathematical Optimization (AREA)
- Shift Register Type Memory (AREA)
- Logic Circuits (AREA)
- Complex Calculations (AREA)
Abstract
1410083 Carry propagate circuits TEXAS INSTRUMENTS Inc 29 Aug 1972 [31 Aug 1971 (7)] 8276/75 Divided out of 1410081 Heading G4A The carry terminals 82 of an arithmetic unit are precharged to reference potential during one phase of a clock signal and are selectively discharged (by FET transfer gate 160) according to the logic level of the carry signal (C n-1 (X n # Y n )). The carry generated within each stage of the arithmetic unit (X n .Y n ) is used to open FET transfer gate 158. The disclosure is identical to that of the parent Specification 1,410,081.
Applications Claiming Priority (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US17666771A | 1971-08-31 | 1971-08-31 | |
US17667071A | 1971-08-31 | 1971-08-31 | |
US17666671A | 1971-08-31 | 1971-08-31 | |
US17666871A | 1971-08-31 | 1971-08-31 | |
US17666571A | 1971-08-31 | 1971-08-31 | |
US05/176,664 US4037094A (en) | 1971-08-31 | 1971-08-31 | Multi-functional arithmetic and logical unit |
US05/176,669 US3962684A (en) | 1971-08-31 | 1971-08-31 | Computing system interface using common parallel bus and segmented addressing |
GB4008372A GB1410081A (en) | 1971-08-31 | 1972-08-29 | Central processing unit of a computing system |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1410083A true GB1410083A (en) | 1975-10-15 |
Family
ID=27571196
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB827675A Expired GB1410083A (en) | 1971-08-31 | 1972-08-29 | Arithmetic logic unit |
GB823875A Expired GB1410084A (en) | 1971-08-31 | 1972-08-29 | Arithmetic logic unit |
GB826075A Expired GB1410082A (en) | 1971-08-31 | 1972-08-29 | Central processing unit |
Family Applications After (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB823875A Expired GB1410084A (en) | 1971-08-31 | 1972-08-29 | Arithmetic logic unit |
GB826075A Expired GB1410082A (en) | 1971-08-31 | 1972-08-29 | Central processing unit |
Country Status (1)
Country | Link |
---|---|
GB (3) | GB1410083A (en) |
-
1972
- 1972-08-29 GB GB827675A patent/GB1410083A/en not_active Expired
- 1972-08-29 GB GB823875A patent/GB1410084A/en not_active Expired
- 1972-08-29 GB GB826075A patent/GB1410082A/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
GB1410082A (en) | 1975-10-15 |
GB1410084A (en) | 1975-10-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
GB1342099A (en) | Logic circuit using complementary type insulated gate field effect transistors | |
GB1514964A (en) | Logic level difference shifting circuit | |
GB1254537A (en) | Digital computer apparatus | |
CH609201B (en) | DIVIDER FOR THE TIME-GUARD CIRCUIT OF AN ELECTRONIC CLOCK PART. | |
GB1472969A (en) | Protected mos circuit | |
GB1410083A (en) | Arithmetic logic unit | |
JPS5472641A (en) | Voltage detection circuit | |
CA1008516A (en) | Logic circuit comprised of insulated gate fet transistors to form a shift register and counter circuit | |
GB1391340A (en) | Field effect transistor circuit | |
GB1333645A (en) | Divider circuits | |
GB1386294A (en) | Flip-flop circuits | |
JPS5261945A (en) | Transistor circuit | |
GB1454104A (en) | Logical circuits | |
GB1495372A (en) | Bistable multivibrator circuit | |
GB1304779A (en) | ||
GB959390A (en) | Data latching circuits | |
GB1006252A (en) | Electronic shift registers | |
GB1069930A (en) | Improvements in or relating to data transmission systems | |
SE325608B (en) | ||
GB1169780A (en) | Integrator System | |
GB1017543A (en) | Improvements in or relating to logical circuitry | |
JPS55656A (en) | Complementary mos logic circuit | |
JPS57106229A (en) | Cmos multiinput storage circuit | |
GB952528A (en) | Improvements in or relating to delay lines | |
GB922106A (en) | Binary adding circuit |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PE20 | Patent expired after termination of 20 years |