GB1379838A - Manufacture of insulated gate field effect transistor devices - Google Patents

Manufacture of insulated gate field effect transistor devices

Info

Publication number
GB1379838A
GB1379838A GB4318272A GB4318272A GB1379838A GB 1379838 A GB1379838 A GB 1379838A GB 4318272 A GB4318272 A GB 4318272A GB 4318272 A GB4318272 A GB 4318272A GB 1379838 A GB1379838 A GB 1379838A
Authority
GB
United Kingdom
Prior art keywords
gate
film
insulant
films
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB4318272A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP7290071A external-priority patent/JPS4840386A/ja
Priority claimed from JP182472A external-priority patent/JPS4871887A/ja
Priority claimed from JP47003301A external-priority patent/JPS4871976A/ja
Priority claimed from JP47059746A external-priority patent/JPS4921079A/ja
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of GB1379838A publication Critical patent/GB1379838A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/0883—Combination of depletion and enhancement field effect transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28185—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28202—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/3115—Doping the insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8236—Combination of enhancement and depletion transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • H01L29/513—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/518—Insulating materials associated therewith the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

1379838 Semi-conductor devices FUJITSU Ltd 18 Sept 1972 [18 Sept 1971 27 Dec 1971 28 Dec 1971 15 June 1972] 43182/72 Heading H1K A P-channel IGFET having transistor regions 82, 83 comprising enhancement and depletion modes (Fig. 3) is manufactured from a substrate 81 on N-type Si on which an insulant film 84 of SiO 2 and a further insulant film of Si 2 N 4 are deposited; the latter having lower impurity diffusion properties. Windows are etched therein and source and drain electrodes 86 and gate electrodes 87 are deposited thereon, and source and drain region 88, 89, 90 are P-diffused to form first and second FET's 82, 83 series connected through common electrode 86. Transistor 82 is of depletion mode wherein the diffused impurity produces a conductivity type similar to regions 88, 89, 90, but transistor 83 is of enhancement mode wherein the impurity produces an opposite conductivity type. Initially the SiO 2 insulant film 84 is formed on the substrate and the Si 3 N 4 films formed to overlay the gate insulant film of transistor 82, after which polycrystalline layers 87 are deposited on the gate insulant films. Thereafter B impurity is diffused into the assembly, and easily penetrates the films 87 and the thin SiO 2 film, but not the Si 3 N 4 film; the transistor element of which assumes the enhancement mode while the other element assumes a depletion mode by reason of the diffusion of B into the gate insulant film to establish an electric field influencing the substrate 81 lying thereunder. In a modification (Fig. 4, not shown) a N-type Si semi-conductor is oxidized thermally to a SiO 2 gate insulant film on its surface, a Si 3 N 4 film is formed thereon, and selectively removed at an area overlying the gate region of the depletion mode transistor element. A polycrystalline Si layer is deposited over the substrate and the films thereon, and is selectively etched out except where it overlies the gate regions, the remaining layer being used for an etching mask to expose the substrate at the P-type boron indiffusion layers. Transistor elements with the SiO 2 and Si 3 N 4 films are of enhancement mode and negative threshold voltage, while the elements with the SiO 2 film are of depletion mode and have positive threshold voltage. Silicon oxide films surround the polycrystalline gate electrodes and source and drain electrodes are provided to contact the respective source and drain regions to complete the enhancement depletion element. Alternatively the gate electrodes may be of Al, with impurity diffusion prior to their formation. In similar modifications (Figs. 5, 6, not shown) comprising enhancement and depletion FET elements simultaneously formed on the same substrate, gate insulant films are formed in the position of the polycrystalline gate electrodes of the respective elements, and an insulant film resistant to impurity diffusion is formed on the gate insulant film of one element prior to the impurity diffusion; the impurity, e.g. B is diffused into the substrate surface through the gate insulant film of one transistor element to change the impurity concentration in the substrate, and is not so diffused in the other transistor element. The device thus embodies an enhancement FET in series with a depletion FET as load resistor with a common sourcedrain. The gate electrodes may alternatively be of Al with prior impurity diffusion. Introduction of impurities, e.g. B may be by predeposition of B 2 O 3 on the substrate as a diffused layer from BBr 3 and dry O 2 , followed by drive-in thermal reduction pretreatment with wet O 2 during thermal diffusion; which is followed by further thermal diffusion in dry N 2 . The process is described in detail for the introduction of the impurity as an immobile negative charge in the gate insulant films, and for diffusion of the impurity through the gate insulant films into the semi-conductor substrate; the films being of two distinct kinds or thicknesses.
GB4318272A 1971-09-18 1972-09-18 Manufacture of insulated gate field effect transistor devices Expired GB1379838A (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP7290071A JPS4840386A (en) 1971-09-18 1971-09-18
JP182472A JPS4871887A (en) 1971-12-27 1971-12-27
JP47003301A JPS4871976A (en) 1971-12-28 1971-12-28
JP47059746A JPS4921079A (en) 1972-06-15 1972-06-15

Publications (1)

Publication Number Publication Date
GB1379838A true GB1379838A (en) 1975-01-08

Family

ID=27453490

Family Applications (1)

Application Number Title Priority Date Filing Date
GB4318272A Expired GB1379838A (en) 1971-09-18 1972-09-18 Manufacture of insulated gate field effect transistor devices

Country Status (4)

Country Link
DE (1) DE2245165A1 (en)
FR (1) FR2153004B1 (en)
GB (1) GB1379838A (en)
NL (1) NL165331C (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1039154B (en) * 1974-08-12 1979-12-10 Ibm IMPROVEMENT IN MANUFACTURING PROCESSES OF DEVICES USING SEMICONDUCTOR PARTICULARLY MOS STRUCTURES
NL7710635A (en) * 1977-09-29 1979-04-02 Philips Nv METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE.

Also Published As

Publication number Publication date
NL7212627A (en) 1973-03-20
FR2153004B1 (en) 1977-04-01
NL165331B (en) 1980-10-15
FR2153004A1 (en) 1973-04-27
DE2245165A1 (en) 1973-04-26
NL165331C (en) 1981-03-16

Similar Documents

Publication Publication Date Title
US4395726A (en) Semiconductor device of silicon on sapphire structure having FETs with different thickness polycrystalline silicon films
GB1423183A (en) Complemenatry field effect transistors
GB1366527A (en) Integrated circuit with substrate containing selectively formed regions of different resistivities
KR930006972A (en) Method of manufacturing field effect transistor
GB1354425A (en) Semiconductor device
GB1501249A (en) Field effect transistor
US4131907A (en) Short-channel V-groove complementary MOS device
GB1210090A (en) Insulated gate field effect transistor
JPS5688354A (en) Semiconductor integrated circuit device
GB1520718A (en) Field effect trasistors
US4003071A (en) Method of manufacturing an insulated gate field effect transistor
GB1316442A (en) Semiconductor devices
GB1453270A (en) Field effect devices
US3711753A (en) Enhancement mode n-channel mos structure and method
GB1457800A (en) Semiconductor devices
JPS55151363A (en) Mos semiconductor device and fabricating method of the same
GB1228471A (en)
GB1183150A (en) Field Effect Transistor
GB1379838A (en) Manufacture of insulated gate field effect transistor devices
JPS55130171A (en) Mos field effect transistor
US3919008A (en) Method of manufacturing MOS type semiconductor devices
JPS54156483A (en) Non-volatile semiconductor memory device
JPS62160770A (en) Insulated gate type field effect transistor
GB2055247A (en) Method of fabricating VMOS transistors
GB1460489A (en) Field-effect transistors

Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee