GB1369059A - Memory control system - Google Patents

Memory control system

Info

Publication number
GB1369059A
GB1369059A GB5110371A GB5110371A GB1369059A GB 1369059 A GB1369059 A GB 1369059A GB 5110371 A GB5110371 A GB 5110371A GB 5110371 A GB5110371 A GB 5110371A GB 1369059 A GB1369059 A GB 1369059A
Authority
GB
United Kingdom
Prior art keywords
memory
data
main memory
main
stores
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB5110371A
Other languages
English (en)
Inventor
K Kurahashi
Y Shimizu
T Hashimoto
N Araki
T Nakajo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Publication of GB1369059A publication Critical patent/GB1369059A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1666—Error detection or correction of the data by redundancy in hardware where the redundant component is memory or memory area
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54508—Configuration, initialisation
    • H04Q3/54533—Configuration data, translation, passwords, databases
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1658—Data re-synchronization of a redundant component, or initial sync of replacement, additional or spare unit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Databases & Information Systems (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Monitoring And Testing Of Exchanges (AREA)
  • Exchange Systems With Centralized Control (AREA)
GB5110371A 1970-11-06 1971-11-03 Memory control system Expired GB1369059A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9719870A JPS5627905B1 (de) 1970-11-06 1970-11-06

Publications (1)

Publication Number Publication Date
GB1369059A true GB1369059A (en) 1974-10-02

Family

ID=14185883

Family Applications (1)

Application Number Title Priority Date Filing Date
GB5110371A Expired GB1369059A (en) 1970-11-06 1971-11-03 Memory control system

Country Status (5)

Country Link
JP (1) JPS5627905B1 (de)
BE (1) BE774980A (de)
FR (1) FR2113653A5 (de)
GB (1) GB1369059A (de)
SE (1) SE419382B (de)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2403598A1 (fr) * 1977-09-14 1979-04-13 Siemens Ag Systeme de calculateur
WO1984002409A1 (en) * 1982-12-09 1984-06-21 Sequoia Systems Inc Memory backup system
EP0136560A2 (de) * 1983-09-02 1985-04-10 Nec Corporation Lose gekoppeltes Multiprozessorsystem fähig zur Übertragung einer Steuersignalmenge unter Verwendung eines gemeinsamen Speichers
WO1985002926A1 (en) * 1983-12-27 1985-07-04 American Telephone & Telegraph Company Processing system tolerant of loss of access to secondary storage

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2403598A1 (fr) * 1977-09-14 1979-04-13 Siemens Ag Systeme de calculateur
WO1984002409A1 (en) * 1982-12-09 1984-06-21 Sequoia Systems Inc Memory backup system
EP0136560A2 (de) * 1983-09-02 1985-04-10 Nec Corporation Lose gekoppeltes Multiprozessorsystem fähig zur Übertragung einer Steuersignalmenge unter Verwendung eines gemeinsamen Speichers
EP0136560A3 (en) * 1983-09-02 1987-10-28 Nec Corporation Loosely coupled multiprocessor system capable of transferring a control signal set by the use of a common memory
WO1985002926A1 (en) * 1983-12-27 1985-07-04 American Telephone & Telegraph Company Processing system tolerant of loss of access to secondary storage
US4608688A (en) * 1983-12-27 1986-08-26 At&T Bell Laboratories Processing system tolerant of loss of access to secondary storage

Also Published As

Publication number Publication date
DE2155111A1 (de) 1972-05-25
FR2113653A5 (de) 1972-06-23
JPS5627905B1 (de) 1981-06-27
BE774980A (fr) 1972-03-01
DE2155111B2 (de) 1975-09-04
SE419382B (sv) 1981-07-27

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
732 Registration of transactions, instruments or events in the register (sect. 32/1977)
PE20 Patent expired after termination of 20 years