GB1288940A - - Google Patents

Info

Publication number
GB1288940A
GB1288940A GB1288940DA GB1288940A GB 1288940 A GB1288940 A GB 1288940A GB 1288940D A GB1288940D A GB 1288940DA GB 1288940 A GB1288940 A GB 1288940A
Authority
GB
United Kingdom
Prior art keywords
polycrystalline
single crystal
layer
regions
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of GB1288940A publication Critical patent/GB1288940A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/041—Manufacture or treatment of isolation regions comprising polycrystalline semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/40—Isolation regions comprising polycrystalline semiconductor materials
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/049—Equivalence and options
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/051—Etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/122—Polycrystalline
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/135—Removal of substrate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/151—Simultaneous diffusion

Landscapes

  • Element Separation (AREA)
  • Recrystallisation Techniques (AREA)
  • Semiconductor Integrated Circuits (AREA)
GB1288940D 1968-12-05 1969-12-03 Expired GB1288940A (enExample)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP43089227A JPS4912795B1 (enExample) 1968-12-05 1968-12-05

Publications (1)

Publication Number Publication Date
GB1288940A true GB1288940A (enExample) 1972-09-13

Family

ID=13964838

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1288940D Expired GB1288940A (enExample) 1968-12-05 1969-12-03

Country Status (5)

Country Link
US (1) US3871007A (enExample)
JP (1) JPS4912795B1 (enExample)
DE (1) DE1961225A1 (enExample)
GB (1) GB1288940A (enExample)
NL (1) NL164702C (enExample)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2151346C3 (de) * 1971-10-15 1981-04-09 Deutsche Itt Industries Gmbh, 7800 Freiburg Verfahren zum Herstellung einer aus Einkristallschichtteilen und Polykristallschichtteilen bestehenden Halbleiterschicht auf einem Einkristallkörper
US4053335A (en) * 1976-04-02 1977-10-11 International Business Machines Corporation Method of gettering using backside polycrystalline silicon
JPS5951743B2 (ja) * 1978-11-08 1984-12-15 株式会社日立製作所 半導体集積装置
US4242697A (en) * 1979-03-14 1980-12-30 Bell Telephone Laboratories, Incorporated Dielectrically isolated high voltage semiconductor devices
US4231819A (en) * 1979-07-27 1980-11-04 Massachusetts Institute Of Technology Dielectric isolation method using shallow oxide and polycrystalline silicon utilizing a preliminary etching step
US4283235A (en) * 1979-07-27 1981-08-11 Massachusetts Institute Of Technology Dielectric isolation using shallow oxide and polycrystalline silicon utilizing selective oxidation
GB2104722B (en) * 1981-06-25 1985-04-24 Suwa Seikosha Kk Mos semiconductor device and method of manufacturing the same
EP0109996B1 (fr) * 1982-11-26 1987-06-03 International Business Machines Corporation Structure de résistance autopolarisée et application à la réalisation de circuits d'interface
US4879585A (en) * 1984-03-31 1989-11-07 Kabushiki Kaisha Toshiba Semiconductor device
US4860081A (en) * 1984-06-28 1989-08-22 Gte Laboratories Incorporated Semiconductor integrated circuit structure with insulative partitions
US4649630A (en) * 1985-04-01 1987-03-17 Motorola, Inc. Process for dielectrically isolated semiconductor structure
JPS6281745A (ja) * 1985-10-05 1987-04-15 Fujitsu Ltd ウエハ−規模のｌｓｉ半導体装置とその製造方法
JP2567472B2 (ja) * 1989-05-24 1996-12-25 日産自動車株式会社 半導体装置
US5212109A (en) * 1989-05-24 1993-05-18 Nissan Motor Co., Ltd. Method for forming PN junction isolation regions by forming buried regions of doped polycrystalline or amorphous semiconductor
JP2890601B2 (ja) * 1990-02-08 1999-05-17 株式会社デンソー 半導体センサ
US7112867B2 (en) * 2003-12-05 2006-09-26 Intel Corporation Resistive isolation between a body and a body contact
US20070042563A1 (en) * 2005-08-19 2007-02-22 Honeywell International Inc. Single crystal based through the wafer connections technical field

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3320485A (en) * 1964-03-30 1967-05-16 Trw Inc Dielectric isolation for monolithic circuit
US3335038A (en) * 1964-03-30 1967-08-08 Ibm Methods of producing single crystals on polycrystalline substrates and devices using same

Also Published As

Publication number Publication date
NL164702C (nl) 1981-01-15
DE1961225A1 (de) 1970-08-27
US3871007A (en) 1975-03-11
NL164702B (nl) 1980-08-15
JPS4912795B1 (enExample) 1974-03-27
NL6918283A (enExample) 1970-06-09

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee