GB1277714A - Multiple phase clock signal generator using frequency related and phase separated signals - Google Patents
Multiple phase clock signal generator using frequency related and phase separated signalsInfo
- Publication number
- GB1277714A GB1277714A GB239571A GB239571A GB1277714A GB 1277714 A GB1277714 A GB 1277714A GB 239571 A GB239571 A GB 239571A GB 239571 A GB239571 A GB 239571A GB 1277714 A GB1277714 A GB 1277714A
- Authority
- GB
- United Kingdom
- Prior art keywords
- gates
- trains
- gate
- frequency
- positive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003990 capacitor Substances 0.000 abstract 1
- 230000010355 oscillation Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
- G11C7/222—Clock generating, synchronizing or distributing circuits within memory device
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4076—Timing circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/354—Astable circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/02—Shaping pulses by amplifying
- H03K5/023—Shaping pulses by amplifying using field effect transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/04—Shaping pulses by increasing duration; by decreasing duration
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/04—Shaping pulses by increasing duration; by decreasing duration
- H03K5/05—Shaping pulses by increasing duration; by decreasing duration by the use of clock signals or other time reference signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
- H03K5/15013—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
- H03K5/15013—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
- H03K5/15026—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with asynchronously driven series connected output stages
- H03K5/1504—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with asynchronously driven series connected output stages using a chain of active delay devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
- H03K5/151—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with two complementary outputs
- H03K5/1515—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with two complementary outputs non-overlapping
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/04—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Manipulation Of Pulses (AREA)
- Laminated Bodies (AREA)
- Lining Or Joining Of Plastics Or The Like (AREA)
- Dc-Dc Converters (AREA)
- Shift Register Type Memory (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US4609570A | 1970-06-15 | 1970-06-15 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1277714A true GB1277714A (en) | 1972-06-14 |
Family
ID=21941582
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB239571A Expired GB1277714A (en) | 1970-06-15 | 1971-01-18 | Multiple phase clock signal generator using frequency related and phase separated signals |
Country Status (7)
Families Citing this family (39)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1381963A (en) * | 1971-05-07 | 1975-01-29 | Tokyo Shibaura Electric Co | Counter using insulated gate field effect transistors |
| JPS494553U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1972-04-14 | 1974-01-16 | ||
| US3986046A (en) * | 1972-07-24 | 1976-10-12 | General Instrument Corporation | Dual two-phase clock system |
| JPS532308B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1972-09-25 | 1978-01-26 | ||
| US3898479A (en) * | 1973-03-01 | 1975-08-05 | Mostek Corp | Low power, high speed, high output voltage fet delay-inverter stage |
| US3927334A (en) * | 1974-04-11 | 1975-12-16 | Electronic Arrays | MOSFET bistrap buffer |
| JPS50137662A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1974-04-20 | 1975-10-31 | ||
| US3946255A (en) * | 1974-04-25 | 1976-03-23 | Honeywell Inc. | Signal generator |
| US3906255A (en) * | 1974-09-06 | 1975-09-16 | Motorola Inc | MOS current limiting output circuit |
| JPS5192154A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1975-02-10 | 1976-08-12 | ||
| US4034242A (en) * | 1975-08-25 | 1977-07-05 | Teletype Corporation | Logic circuits and on-chip four phase FET clock generator made therefrom |
| US4061933A (en) * | 1975-12-29 | 1977-12-06 | Mostek Corporation | Clock generator and delay stage |
| JPS52119152A (en) * | 1976-03-31 | 1977-10-06 | Toshiba Corp | Oscillation circuit |
| DE2713319C2 (de) * | 1977-03-25 | 1983-08-18 | Siemens AG, 1000 Berlin und 8000 München | Taktgeber für digitale Halbleiterschaltungen |
| US4140927A (en) * | 1977-04-04 | 1979-02-20 | Teletype Corporation | Non-overlapping clock generator |
| GB1573771A (en) * | 1977-09-26 | 1980-08-28 | Philips Electronic Associated | Buffer circuit |
| FR2414823A1 (fr) * | 1978-01-13 | 1979-08-10 | Thomson Csf | Dispositif dephaseur a semi-conducteur et filtre a transfert de charges comportant un tel dispositif |
| JPS5513566A (en) * | 1978-07-17 | 1980-01-30 | Hitachi Ltd | Mis field effect semiconductor circuit device |
| JPS57147537U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1981-03-12 | 1982-09-16 | ||
| JPS58220291A (ja) * | 1982-06-15 | 1983-12-21 | Nec Corp | 信号伝般時間制御回路 |
| US4494021A (en) * | 1982-08-30 | 1985-01-15 | Xerox Corporation | Self-calibrated clock and timing signal generator for MOS/VLSI circuitry |
| IT1210945B (it) * | 1982-10-22 | 1989-09-29 | Ates Componenti Elettron | Circuito di interfaccia per generatori di segnali di sincronismo a due fasi nonsovrapposte. |
| JPS5987695A (ja) * | 1982-11-11 | 1984-05-21 | Toshiba Corp | 半導体記憶装置 |
| US4658161A (en) * | 1985-08-13 | 1987-04-14 | Hewlett-Packard Company | Split phase loop |
| IT1190324B (it) * | 1986-04-18 | 1988-02-16 | Sgs Microelettronica Spa | Disoverlappatore di fase per circuiti integrati mos,particolarmente per il controllo di filtri a capacita' commutate |
| JPS6324712A (ja) * | 1986-07-17 | 1988-02-02 | Toshiba Corp | Mos型半導体回路 |
| JPS63222109A (ja) * | 1987-03-11 | 1988-09-16 | Sunstar Inc | 毛髪処理剤 |
| WO1989011182A1 (en) * | 1988-05-06 | 1989-11-16 | Magellan Corporation (Australia) Pty. Ltd. | Low-power clocking circuits |
| US4885485A (en) * | 1988-08-30 | 1989-12-05 | Vtc Incorporated | CMOS Output buffer providing mask programmable output drive current |
| US5355037A (en) * | 1992-06-15 | 1994-10-11 | Texas Instruments Incorporated | High performance digital phase locked loop |
| DE4324519C2 (de) * | 1992-11-12 | 1994-12-08 | Hewlett Packard Co | NCMOS - eine Hochleistungslogikschaltung |
| US5352945A (en) * | 1993-03-18 | 1994-10-04 | Micron Semiconductor, Inc. | Voltage compensating delay element |
| US5952863A (en) * | 1996-12-09 | 1999-09-14 | Texas Instruments Incorporated | Circuit and method for generating non-overlapping clock signals for an integrated circuit |
| US6294939B1 (en) * | 1998-10-30 | 2001-09-25 | Stmicroelectronics, Inc. | Device and method for data input buffering |
| US6603338B1 (en) | 1998-10-30 | 2003-08-05 | Stmicroelectronics, Inc. | Device and method for address input buffering |
| JP4040456B2 (ja) * | 2000-11-01 | 2008-01-30 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | 2線式通信バスに対称形の出力信号を供給するラインドライバ |
| US6618277B2 (en) * | 2001-08-14 | 2003-09-09 | Sun Microsystems, Inc. | Apparatus for reducing the supply noise near large clock drivers |
| JP4653000B2 (ja) * | 2006-03-27 | 2011-03-16 | 富士通セミコンダクター株式会社 | プリスケーラ及びバッファ |
| JP2017199975A (ja) * | 2016-04-25 | 2017-11-02 | 磯野 正夫 | 多相交流発生装置 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3154744A (en) * | 1959-12-09 | 1964-10-27 | Ibm | Double trigger composed of binary logic elements |
| BE639278A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1962-10-29 | |||
| US3248657A (en) * | 1963-10-18 | 1966-04-26 | Rca Corp | Pulse generator employing serially connected delay lines |
| US3441727A (en) * | 1965-02-12 | 1969-04-29 | Melpar Inc | Function generator for simultaneously producing electrical wave forms of like wave shape and of predetermined phase displacement |
| US3551823A (en) * | 1967-04-24 | 1970-12-29 | Cossor Ltd A C | Electrical pulse decoders |
| US3532991A (en) * | 1968-05-08 | 1970-10-06 | Rca Corp | Shift circuits including threshold or other logic gates and employing multiple-phase shift pulses |
-
1970
- 1970-05-28 JP JP45046095A patent/JPS5022593B1/ja active Pending
- 1970-06-15 US US3641370D patent/US3641370A/en not_active Expired - Lifetime
-
1971
- 1971-01-18 GB GB239571A patent/GB1277714A/en not_active Expired
- 1971-01-29 NL NL7101196A patent/NL7101196A/xx unknown
- 1971-02-25 SE SE239971A patent/SE361992B/xx unknown
- 1971-03-02 DE DE2109936A patent/DE2109936C3/de not_active Expired
- 1971-03-16 FR FR7109221A patent/FR2095494A5/fr not_active Expired
- 1971-03-27 JP JP1830971A patent/JPS5120144B1/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| SE361992B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1973-11-19 |
| JPS479A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1972-01-05 |
| DE2109936B2 (de) | 1980-05-29 |
| FR2095494A5 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1972-02-11 |
| JPS5120144B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1976-06-23 |
| DE2109936A1 (de) | 1971-12-16 |
| US3641370A (en) | 1972-02-08 |
| DE2109936C3 (de) | 1981-02-05 |
| NL7101196A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1971-12-17 |
| JPS5022593B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1975-07-31 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed [section 19, patents act 1949] | ||
| PE20 | Patent expired after termination of 20 years |