GB1277333A - Semiconductor devices - Google Patents

Semiconductor devices

Info

Publication number
GB1277333A
GB1277333A GB34517/70A GB3451770A GB1277333A GB 1277333 A GB1277333 A GB 1277333A GB 34517/70 A GB34517/70 A GB 34517/70A GB 3451770 A GB3451770 A GB 3451770A GB 1277333 A GB1277333 A GB 1277333A
Authority
GB
United Kingdom
Prior art keywords
base
emitter
oxide
border
islands
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB34517/70A
Inventor
James Arthur Oakes
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motors Liquidation Co
Original Assignee
Motors Liquidation Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motors Liquidation Co filed Critical Motors Liquidation Co
Publication of GB1277333A publication Critical patent/GB1277333A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/4824—Pads with extended contours, e.g. grid structure, branch structure, finger structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H01L2924/12036—PN diode

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Bipolar Transistors (AREA)
  • Formation Of Insulating Films (AREA)
  • Thyristors (AREA)

Abstract

1277333 Semi-conductor devices GENERAL MOTORS CORP 16 July 1970 [31 July 1969] 34517/70 Heading H1K A silicon planar PNP transistor comprises a P-type wafer 12 having one surface 14 with a refractory oxide coating overlain by aluminium contacts 20, 22. Within the wafer are surface extending conductivity regions; an N-type base 24; a P-type emitter 26 and a P+ expanded guard ring 28; the collector being the remainder of the wafer to define a collector base PN junction 32 and an emitter base PN junction 34. The base 24 is surrounded by a narrow collector border 36, and guard ring 28 surrounds base 24 non-contiguously and border 36 contiguously; extending to the periphery of surface 14 with inserted semi-circular collector islands 38, 40 spacedly adjacent from opposite sides of border 36. A thick layer 42 of silicon oxide overlays islands 38, 40 and border 36 while a thin layer 44 of oxide overlays guard ring 28 and a portion of emitter 26, and an intermediate thickness oxide coating overlap the base-emitter junction. Contacts 20, 22 are electrically connected to emitter 26 and base 24 and comprise bonding pads 48, 50 overlying islands 38, 40 with inwardly-extending interdigitated electrodes 49, 51 engaging base and emitter through openings of the oxide, and wire connectors 52, 54 are pressure bonded to pads 48, 50. In manufacture, surface 12 is cleaned and oxidized, a window etched therein for N-type diffusion to form base 24; reoxidized and etched to form a further smaller window overlying the base for P-type diffusion for the emitter 26. Oxide is also removed from the surface from border 32 to the perimeter except for the overlying islands 38, 40 to allow diffusion to form P + guard ring 28, followed by further oxidation. Openings in the oxide overlying emitter 26 and base 24 are etched for contacts, and aluminium contacts 20, 22 evaporated on with interdigitated electrodes connecting to base and emitter.
GB34517/70A 1969-07-31 1970-07-16 Semiconductor devices Expired GB1277333A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US84637869A 1969-07-31 1969-07-31

Publications (1)

Publication Number Publication Date
GB1277333A true GB1277333A (en) 1972-06-14

Family

ID=25297756

Family Applications (1)

Application Number Title Priority Date Filing Date
GB34517/70A Expired GB1277333A (en) 1969-07-31 1970-07-16 Semiconductor devices

Country Status (3)

Country Link
DE (1) DE2038283C3 (en)
FR (1) FR2060067B1 (en)
GB (1) GB1277333A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2631810C3 (en) * 1976-07-15 1979-03-15 Deutsche Itt Industries Gmbh, 7800 Freiburg Planar semiconductor device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1073554A (en) * 1964-08-18 1967-06-28 Hughes Aircraft Co Planar semiconductor devices
FR1459892A (en) * 1964-08-20 1966-06-17 Texas Instruments Inc Semiconductor devices
GB1196098A (en) * 1967-10-02 1970-06-24 Hitachi Ltd A Semiconductor Device and a method of Manufacturing the same

Also Published As

Publication number Publication date
FR2060067A1 (en) 1971-06-11
DE2038283A1 (en) 1971-03-04
FR2060067B1 (en) 1974-03-22
DE2038283B2 (en) 1972-04-20
DE2038283C3 (en) 1973-12-13

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Legal Events

Date Code Title Description
PS Patent sealed
PLNP Patent lapsed through nonpayment of renewal fees