GB1246294A - Method of manufacturing semiconductor devices - Google Patents

Method of manufacturing semiconductor devices

Info

Publication number
GB1246294A
GB1246294A GB57279/68A GB5727968A GB1246294A GB 1246294 A GB1246294 A GB 1246294A GB 57279/68 A GB57279/68 A GB 57279/68A GB 5727968 A GB5727968 A GB 5727968A GB 1246294 A GB1246294 A GB 1246294A
Authority
GB
United Kingdom
Prior art keywords
layer
seeding
seeding site
layers
exposed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB57279/68A
Other languages
English (en)
Inventor
Isamu Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of GB1246294A publication Critical patent/GB1246294A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2902—Materials being Group IVA materials
    • H10P14/2905—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/27—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials
    • H10P14/271—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials characterised by the preparation of substrate for selective deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/043—Dual dielectric
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/051—Etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/10—Lift-off masking
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/122—Polycrystalline
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/969—Simultaneous formation of monocrystalline and polycrystalline regions

Landscapes

  • Element Separation (AREA)
  • Quick-Acting Or Multi-Walled Pipe Joints (AREA)
GB57279/68A 1967-12-12 1968-12-03 Method of manufacturing semiconductor devices Expired GB1246294A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7996167 1967-12-12

Publications (1)

Publication Number Publication Date
GB1246294A true GB1246294A (en) 1971-09-15

Family

ID=13704886

Family Applications (1)

Application Number Title Priority Date Filing Date
GB57279/68A Expired GB1246294A (en) 1967-12-12 1968-12-03 Method of manufacturing semiconductor devices

Country Status (10)

Country Link
US (1) US3692574A (enExample)
AT (1) AT283448B (enExample)
BE (1) BE725244A (enExample)
CH (1) CH486774A (enExample)
DE (1) DE1814029C3 (enExample)
FR (1) FR1593881A (enExample)
GB (1) GB1246294A (enExample)
NL (1) NL140101B (enExample)
NO (1) NO123439B (enExample)
SE (1) SE354382B (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2129019A (en) * 1982-09-30 1984-05-10 Western Electric Co Method of forming a heterostructure comprising a heteroepitaxial multiconstituent material
GB2228617A (en) * 1989-02-27 1990-08-29 Philips Electronic Associated A method of manufacturing a semiconductor device having a mesa structure
GB2234263A (en) * 1989-06-16 1991-01-30 Intel Corp Novel masking technique for depositing gallium arsenide on silicon

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4396933A (en) * 1971-06-18 1983-08-02 International Business Machines Corporation Dielectrically isolated semiconductor devices
US3928092A (en) * 1974-08-28 1975-12-23 Bell Telephone Labor Inc Simultaneous molecular beam deposition of monocrystalline and polycrystalline III(a)-V(a) compounds to produce semiconductor devices
US4022928A (en) * 1975-05-22 1977-05-10 Piwcyzk Bernhard P Vacuum deposition methods and masking structure
GB1520925A (en) * 1975-10-06 1978-08-09 Mullard Ltd Semiconductor device manufacture
DE2967388D1 (en) * 1978-09-20 1985-03-28 Fujitsu Ltd Semiconductor memory device and process for fabricating the device
FR2525389A1 (fr) * 1982-04-14 1983-10-21 Commissariat Energie Atomique Procede de positionnement d'une ligne d'interconnexion sur un trou de contact electrique d'un circuit integre
KR100186886B1 (ko) * 1993-05-26 1999-04-15 야마자끼 승페이 반도체장치 제작방법
KR100355938B1 (ko) * 1993-05-26 2002-12-16 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체장치제작방법
US6090646A (en) 1993-05-26 2000-07-18 Semiconductor Energy Laboratory Co., Ltd. Method for producing semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2129019A (en) * 1982-09-30 1984-05-10 Western Electric Co Method of forming a heterostructure comprising a heteroepitaxial multiconstituent material
GB2228617A (en) * 1989-02-27 1990-08-29 Philips Electronic Associated A method of manufacturing a semiconductor device having a mesa structure
GB2234263A (en) * 1989-06-16 1991-01-30 Intel Corp Novel masking technique for depositing gallium arsenide on silicon
GB2234263B (en) * 1989-06-16 1993-05-19 Intel Corp Novel masking technique for depositing gallium arsenide on silicon
US5256594A (en) * 1989-06-16 1993-10-26 Intel Corporation Masking technique for depositing gallium arsenide on silicon

Also Published As

Publication number Publication date
NL6817602A (enExample) 1969-06-16
SE354382B (enExample) 1973-03-05
DE1814029B2 (de) 1978-02-09
NO123439B (enExample) 1971-11-15
FR1593881A (enExample) 1970-06-01
US3692574A (en) 1972-09-19
DE1814029C3 (de) 1979-08-23
DE1814029A1 (de) 1969-08-14
AT283448B (de) 1970-08-10
NL140101B (nl) 1973-10-15
BE725244A (enExample) 1969-05-16
CH486774A (de) 1970-02-28

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