GB1173097A - A Method for Controlling the Surface Potential of a Semiconductor - Google Patents

A Method for Controlling the Surface Potential of a Semiconductor

Info

Publication number
GB1173097A
GB1173097A GB55704/67A GB5570467A GB1173097A GB 1173097 A GB1173097 A GB 1173097A GB 55704/67 A GB55704/67 A GB 55704/67A GB 5570467 A GB5570467 A GB 5570467A GB 1173097 A GB1173097 A GB 1173097A
Authority
GB
United Kingdom
Prior art keywords
deposition
surface potential
source
sio
oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB55704/67A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB1173097A publication Critical patent/GB1173097A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40—Oxides
    • C23C16/401—Oxides containing silicon
    • C23C16/402—Silicon dioxide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02142—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
    • H01L21/02145—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides the material containing aluminium, e.g. AlSiOx
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Formation Of Insulating Films (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)

Abstract

1,173,097. Treatment of semi-conductors. INTERNATIONAL BUSINESS MACHINES CORP. 7 Dec., 1967 [13 Jan., 1967], No. 55704/67. Heading H1K. [Also in Division C1] The surface potential induced on a semiconductor body is controlled by depositing thereon a plurality of metal oxides in a non- oxidizing atmosphere. The oxides may be deposited as a homogeneous mixture or as a plurality of sequentially deposited layers partially mixed at their interface by a subsequent heating stage. Deposition &c. is effected at a temperature such that diffusion of the constituents of the metal oxides into the semi-conductor body does not occur. In the embodiment nitrogen (other gases are mentioned) from a source 5 is used to provide the non-oxidizing atmosphere and to act as a carrier by bubbling through liquid chambers 13, 19 which contain organic sources of aluminium oxide and silicon dioxide respectively. The vapours of these source compounds mix with further nitrogen in a furnace tube 1 and decompose in the vicinity of a wafer 4, e.g. of Ge, Si or GaAs, to deposit thereon a mixed oxide layer. Boron methoxide may also be provided as a source of boron oxide in addition to the illustrated sources or as a replacement for the SiO 2 source. Variation of the nitrogen flow rates through the various liquid sources provides control of the deposited oxide constituency, and hence of the induced surface potential. The same apparatus may also be used for sequential deposition. It is stated that the introduction of a trace of Al 2 O 3 during the SiO 2 deposition results in the production of pure SiO 2 due to the catalytic action of the Al 2 O 3 . Other deposition techniques involving non-oxidizing atmospheres which may be used include R.F. or D.C. sputtering, evaporation, vacuum deposition or ion beam deposition. The invention may be applied to NPN fieldeffect transistors which, by control of the induced surface potential in the channel region, can be made to be normally non-conducting without the need for external biasing. MOS capacitative methods are used to measure the surface potential in terms of surface charge density.
GB55704/67A 1967-01-13 1967-12-07 A Method for Controlling the Surface Potential of a Semiconductor Expired GB1173097A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US60920067A 1967-01-13 1967-01-13

Publications (1)

Publication Number Publication Date
GB1173097A true GB1173097A (en) 1969-12-03

Family

ID=24439760

Family Applications (1)

Application Number Title Priority Date Filing Date
GB55704/67A Expired GB1173097A (en) 1967-01-13 1967-12-07 A Method for Controlling the Surface Potential of a Semiconductor

Country Status (8)

Country Link
JP (2) JPS4945627B1 (en)
BE (1) BE706603A (en)
CH (1) CH487506A (en)
DE (1) DE1621272C3 (en)
FR (1) FR1548847A (en)
GB (1) GB1173097A (en)
NL (1) NL168369C (en)
SE (1) SE365651B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2268327A (en) * 1992-06-30 1994-01-05 Texas Instruments Ltd Passivated gallium arsenide device

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1255995A (en) * 1968-03-04 1971-12-08 Hitachi Ltd Semiconductor device and method of making same
JPS5356729U (en) * 1976-10-18 1978-05-15
JPS53129436U (en) * 1977-03-18 1978-10-14
JPS5477639U (en) * 1977-11-14 1979-06-02
DE3330865A1 (en) * 1983-08-26 1985-03-14 Siemens AG, 1000 Berlin und 8000 München Apparatus for depositing silicon oxide layers on semiconductor substrates using a CVD coating technique
DE3330864A1 (en) * 1983-08-26 1985-03-14 Siemens AG, 1000 Berlin und 8000 München Apparatus for depositing silicon oxide layers on semiconductor substrates using a CVD coating technique

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2268327A (en) * 1992-06-30 1994-01-05 Texas Instruments Ltd Passivated gallium arsenide device

Also Published As

Publication number Publication date
DE1621272B2 (en) 1977-03-31
BE706603A (en) 1968-04-01
NL6800382A (en) 1968-07-15
CH487506A (en) 1970-03-15
NL168369B (en) 1981-10-16
SE365651B (en) 1974-03-25
JPS4945627B1 (en) 1974-12-05
DE1621272A1 (en) 1971-04-29
DE1621272C3 (en) 1979-08-23
NL168369C (en) 1982-03-16
FR1548847A (en) 1968-12-06
JPS4945628B1 (en) 1974-12-05

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee