GB2268327A - Passivated gallium arsenide device - Google Patents
Passivated gallium arsenide device Download PDFInfo
- Publication number
- GB2268327A GB2268327A GB9213838A GB9213838A GB2268327A GB 2268327 A GB2268327 A GB 2268327A GB 9213838 A GB9213838 A GB 9213838A GB 9213838 A GB9213838 A GB 9213838A GB 2268327 A GB2268327 A GB 2268327A
- Authority
- GB
- United Kingdom
- Prior art keywords
- passivation layers
- gaas
- passivation
- integrated circuit
- gallium arsenide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01014—Silicon [Si]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
Abstract
This invention relates to Passivated Galium Arsenide (GaAs) devices. A GaAs device 10 is provided having one or more passivation layers (14,16) adapted to cover at least part of the device. Typical passiviation layers for this application are Polymide, Silicon Dioxide and Silicon Nitride. The passivation layers may be applied during or after fabrication of the device by spinning or or vacuum deposition. <IMAGE>
Description
PASSIVATED GALLIUM ARSENIDE DEVICE
This invention relates to passivated Gallium Arsenide (GaAs) Devices.
Gallium Arsenide devices have previously been used mostly in military applications where they are packaged in ceramic packages. The ceramic packages are designed to protect the device from the military stress to which it may be subjected, but are expensive and considerably larger than is generally required in non-military applications. In addition, testing of, for example, GaAs monolithic power amplfiers, processed and designed for military applications packaged in the ceramic packages resulted in failures when the non-hermetically packaged die are exposed to high temperature and humidity conditions.
The application of GaAs technology to commercial and large volume manufacturing has led to the development of low cost plastic packaging for GaAs devices. In general, this packaging technique is not hermetic and leaves the GaAs die unprotected against moisture related corrosion and device failure.
Passivation films have been developed for use with Silicon die to protect them when placed in plastic packages. These films are generally applied as the last process step. Si surfaces have also been exposed to 2 or N2 atmosphere to provide a first level of passivation of the surfaces. This is not possible with GaAs.
One object of the present invention is to provide a GaAs device which can withstand high temperatures and humidity whilst providing a device which can be manufactured at relatively low cost and in relatively large volumes.
According to one aspect of the present invention, there is provided a GaAs semiconductor device comprising one or more passivation layers adapted to cover at least a part of the device.
This has the advantage of providing a relatively inexpensive GaAs device which can be mass produced.
Preferably, one of said passivation layers is applied during fabrication of the device and one of said passivation layers is applied after fabrication.
Advantageously, one of said passivation layers is applied after the device has been mounted in a package. The passivation layer may be an inorganic film such as Silicon
Dioxide or Silicon Nitride, or may be an organic film such as a Polyimide.
In a second aspect of the invention, the device may be included in an integrated circuit.
In a third aspect of the present invention, the integrated circuit including the device may be included in a cellphone or the like.
Reference will now be made, by way of example, to the accompanying drawings, in which:
Figure 1 is a cross-sectional view of a device according to one aspect of the present invention; and
Figure 2 is a plan view of an integrated circuit in a package according to a second aspect of the present invention.
Referring to Figure 1, a Gallium Arsenide device is shown generally at 10 fabricated on a wafer shown generally at 12. This device may typically be a heterojunction bipolar transistor(HBT), a Field Effect Transistor (FET), a high electron mobility transistor (HEMT) or any other device fabricated from Gallium Arsenide. During fabrication, a passivation layer 14 is applied to the wafer. Subsequent process steps are then completed including the step of effecting the necessary#metal interconnects 17.: A second passivation layer 16 may then optionally be applied to a portion of the wafer surface after fabrication. The second passivation layer may, for example completely cover the device and its associated circuitry or may cover only part of the device.
Referring to Figure 2, the GaAs device 10 is fabricated in the normal manner and then packaged in a plastic package 18, such as, for example, the QDM (see patent application US 07/890,900).
A passivation layer 20 is then applied to hermetically seal the device in the package.
The passivation layer of the embodiments may be of any appropriate material in the form of an organic or inorganic film, for example. Typical materials include Polyimide (e.g.
spun on), Silicon Dioxide and Silicon Nitride. The material may be deposited in any appropriate manner, for example, vacuum deposition.
Passivation of the GaAs device may comprise applying one, two or all of the passivation layers described above. Since a GaAs device has a topology in which the surface contours vary in height in the order of 10 microns applying more than one passivation layers can be advantageous.
Claims (12)
1. A GaAs semiconductor device comprising one or more passivation layers adapted
to cover at least a part of the device.
2. A device according to claim 1, wherein one of said passivation layers is applied
during fabrication of the device.
3. A device according to claim 1 or claim 2, wherein one of said passivation layers
is applied after fabrication.
4. A device according to any preceding claim, wherein one of said passivation layers
is applied after the device has been mounted in a package.
5. A device according to any proceeding claim, wherein at least one of said
passivation layers comprises an inorganic film.
6. A device according to any proceeding claim, wherein at least one of said
passivation layers comprises a Silicon Dioxide film
7. A device according to any of claims 1 to 5, wherein at least one of said
passivation layers comprises a Silicon Nitride film.
8. A device according to any proceeding claim, wherein at least one of said
passivation layers comprises an organic film.
9. A device according to claim 8, wherein the organic film comprises polyimide.
10. An integrated circuit including a GaAs semiconductor device according to any
preceding claim.
11. An integrated circuit according to claim 10, wherein a fier passivation layer is
applied to at least part of the integrated circuit.
12. A cellphone including an integrated circuit according to claim 10 or claim 11.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9213838A GB2268327A (en) | 1992-06-30 | 1992-06-30 | Passivated gallium arsenide device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9213838A GB2268327A (en) | 1992-06-30 | 1992-06-30 | Passivated gallium arsenide device |
Publications (2)
Publication Number | Publication Date |
---|---|
GB9213838D0 GB9213838D0 (en) | 1992-08-12 |
GB2268327A true GB2268327A (en) | 1994-01-05 |
Family
ID=10717922
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9213838A Withdrawn GB2268327A (en) | 1992-06-30 | 1992-06-30 | Passivated gallium arsenide device |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2268327A (en) |
Citations (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB926828A (en) * | 1961-02-24 | 1963-05-22 | Hughes Aircraft Co | Semiconductor device |
GB1024509A (en) * | 1962-03-23 | 1966-03-30 | Texas Instruments Inc | A passivated semiconductor device and method of making same |
GB1173097A (en) * | 1967-01-13 | 1969-12-03 | Ibm | A Method for Controlling the Surface Potential of a Semiconductor |
GB1261608A (en) * | 1969-01-09 | 1972-01-26 | Ibm | Injection laser |
GB1432949A (en) * | 1972-08-25 | 1976-04-22 | Plessey Co Ltd | Silicon dioxide semiconductor product containing boron trioxide and phosphorus pentoxide dopants |
US4268711A (en) * | 1979-04-26 | 1981-05-19 | Optical Coating Laboratory, Inc. | Method and apparatus for forming films from vapors using a contained plasma source |
GB2064218A (en) * | 1979-11-28 | 1981-06-10 | Sumitomo Electric Industries | A method of Forming an Insulating Film on a Semiconductor Device |
US4542257A (en) * | 1984-04-27 | 1985-09-17 | Hughes Aircraft Company | Solar cell array panel and method of manufacture |
US4751200A (en) * | 1987-03-04 | 1988-06-14 | Bell Communications Research, Inc. | Passivation of gallium arsenide surfaces with sodium sulfide |
GB2200647A (en) * | 1987-02-05 | 1988-08-10 | Gen Electric | Polyimide-siloxanes, method of making and use |
EP0374001A1 (en) * | 1988-12-09 | 1990-06-20 | Thomson-Csf | Hardening process against ionizing radiation for active electronic components, and large hardened components |
EP0453787A2 (en) * | 1990-03-23 | 1991-10-30 | Kabushiki Kaisha Toshiba | Semiconductor device having an insulating film |
-
1992
- 1992-06-30 GB GB9213838A patent/GB2268327A/en not_active Withdrawn
Patent Citations (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB926828A (en) * | 1961-02-24 | 1963-05-22 | Hughes Aircraft Co | Semiconductor device |
GB1024509A (en) * | 1962-03-23 | 1966-03-30 | Texas Instruments Inc | A passivated semiconductor device and method of making same |
GB1173097A (en) * | 1967-01-13 | 1969-12-03 | Ibm | A Method for Controlling the Surface Potential of a Semiconductor |
GB1261608A (en) * | 1969-01-09 | 1972-01-26 | Ibm | Injection laser |
GB1432949A (en) * | 1972-08-25 | 1976-04-22 | Plessey Co Ltd | Silicon dioxide semiconductor product containing boron trioxide and phosphorus pentoxide dopants |
US4268711A (en) * | 1979-04-26 | 1981-05-19 | Optical Coating Laboratory, Inc. | Method and apparatus for forming films from vapors using a contained plasma source |
GB2064218A (en) * | 1979-11-28 | 1981-06-10 | Sumitomo Electric Industries | A method of Forming an Insulating Film on a Semiconductor Device |
US4542257A (en) * | 1984-04-27 | 1985-09-17 | Hughes Aircraft Company | Solar cell array panel and method of manufacture |
GB2200647A (en) * | 1987-02-05 | 1988-08-10 | Gen Electric | Polyimide-siloxanes, method of making and use |
US4751200A (en) * | 1987-03-04 | 1988-06-14 | Bell Communications Research, Inc. | Passivation of gallium arsenide surfaces with sodium sulfide |
EP0374001A1 (en) * | 1988-12-09 | 1990-06-20 | Thomson-Csf | Hardening process against ionizing radiation for active electronic components, and large hardened components |
EP0453787A2 (en) * | 1990-03-23 | 1991-10-30 | Kabushiki Kaisha Toshiba | Semiconductor device having an insulating film |
Also Published As
Publication number | Publication date |
---|---|
GB9213838D0 (en) | 1992-08-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |