GB1134632A - Improvements in or relating to the production of printed circuits - Google Patents
Improvements in or relating to the production of printed circuitsInfo
- Publication number
- GB1134632A GB1134632A GB633065A GB633065A GB1134632A GB 1134632 A GB1134632 A GB 1134632A GB 633065 A GB633065 A GB 633065A GB 633065 A GB633065 A GB 633065A GB 1134632 A GB1134632 A GB 1134632A
- Authority
- GB
- United Kingdom
- Prior art keywords
- substrate
- holes
- etching
- etchant
- overhanging
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4092—Integral conductive tabs, i.e. conductive parts partly detached from the substrate
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
- C23F1/00—Etching metallic material by chemical means
- C23F1/02—Local etching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/002—Etching of the substrate by chemical or physical means by liquid chemical etching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0154—Polyimide
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0548—Masks
- H05K2203/0554—Metal used as mask for etching vias, e.g. by laser ablation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0779—Treatments involving liquids, e.g. plating, rinsing characterised by the specific liquids involved
- H05K2203/0786—Using an aqueous solution, e.g. for cleaning or during drilling of holes
- H05K2203/0789—Aqueous acid solution, e.g. for cleaning or etching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0779—Treatments involving liquids, e.g. plating, rinsing characterised by the specific liquids involved
- H05K2203/0786—Using an aqueous solution, e.g. for cleaning or during drilling of holes
- H05K2203/0793—Aqueous alkaline solution, e.g. for cleaning or etching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Abstract
1,134,632. Printed circuits. ELLIOTT BROS. (LONDON) Ltd. 10 Feb., 1966 [13 Feb., 1965], No. 6330/65. Heading H1R. In a printed circuit arrangement, holes in or through an insulating substrate are formed by chemical etching of the substrate material. The substrate may comprise a polyimide film or sheet, and may be etched by alternate treatment at at least 80‹ C. with cone. H 2 SO 4 and NaOH; alternatively the substrate may be of glass fibre impregnated with epoxy resin or a polyester. The invention is described with reference to printed circuits formed from double-sided Cuclad laminates, although Ni, "Kovar" (Registered Trade Mark), or stainless steel may replace Cu. Holes are etched in the Cu cladding on one or both sides of the laminate at the sites of the substrate holes; the desired circuit pattern is photo-deposited in negative form on the cladding in a plating resist material; the exposed areas of the Cu are electroplated with an etchant resist, e.g. Au; the plating resist is removed and the substrate holes etched out; finally, the exposed Cu is removed by etching. If the Cucladding is bonded to the substrate by a resin adhesive, this is removed with an aqueous solution of chromic trioxide and acetic acid. In an alternative embodiment, the plating step is omitted, the circuit pattern being photo-printed in positive form in an etchant-resist material on the Cu, followed by etching. Single- and double-sided circuits may be formed. The formation of holes with overhanging conductors is described; when electroplating is employed the plated layer may be thickened so that the underlying Cu of the overhanging portions may be removed in the etching step; otherwise, the underside of the overhanging portion is protected by an etchant resist. Use may be made of the lateral etching tendency of the substrate etchant to produce overhanging conductors. Holes in multilayer printed circuit assemblies may be formed by the method of the invention.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB633065A GB1134632A (en) | 1965-02-13 | 1965-02-13 | Improvements in or relating to the production of printed circuits |
FR49285A FR1469676A (en) | 1965-02-13 | 1966-02-11 | Method of manufacturing a printed circuit board |
NL6601794A NL6601794A (en) | 1965-02-13 | 1966-02-11 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB633065A GB1134632A (en) | 1965-02-13 | 1965-02-13 | Improvements in or relating to the production of printed circuits |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1134632A true GB1134632A (en) | 1968-11-27 |
Family
ID=9812535
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB633065A Expired GB1134632A (en) | 1965-02-13 | 1965-02-13 | Improvements in or relating to the production of printed circuits |
Country Status (2)
Country | Link |
---|---|
GB (1) | GB1134632A (en) |
NL (1) | NL6601794A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2188401A1 (en) * | 1972-06-14 | 1974-01-18 | Westinghouse Electric Corp | |
WO1987003773A1 (en) * | 1985-12-09 | 1987-06-18 | Hughes Aircraft Company | Method for selectively removing adhesives from polyimide substrates |
FR2618631A1 (en) * | 1987-07-24 | 1989-01-27 | Thomson Csf | Method of producing electrical connections between sides of printed-circuit boards withstanding thermal stresses, in particular three-board circuits |
WO1993026144A1 (en) * | 1992-06-15 | 1993-12-23 | Dyconex Patente Ag | Process for producing subsequently conditionable contact points on circuit substrates and circuit substrates with such contact points |
FR2834180A1 (en) * | 2001-12-20 | 2003-06-27 | Org Europeene De Rech | Production of a multi layer module for high-density printed circuits comprises anisotropically etching micro holes through a metal-coated polyimide film |
EP1517599A1 (en) * | 2000-02-28 | 2005-03-23 | Sts Atl Corporation | A method of interconnecting opposite sides of an electronic component interconnection device |
US11134575B2 (en) * | 2019-09-30 | 2021-09-28 | Gentherm Gmbh | Dual conductor laminated substrate |
-
1965
- 1965-02-13 GB GB633065A patent/GB1134632A/en not_active Expired
-
1966
- 1966-02-11 NL NL6601794A patent/NL6601794A/xx unknown
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2188401A1 (en) * | 1972-06-14 | 1974-01-18 | Westinghouse Electric Corp | |
WO1987003773A1 (en) * | 1985-12-09 | 1987-06-18 | Hughes Aircraft Company | Method for selectively removing adhesives from polyimide substrates |
FR2618631A1 (en) * | 1987-07-24 | 1989-01-27 | Thomson Csf | Method of producing electrical connections between sides of printed-circuit boards withstanding thermal stresses, in particular three-board circuits |
WO1993026144A1 (en) * | 1992-06-15 | 1993-12-23 | Dyconex Patente Ag | Process for producing subsequently conditionable contact points on circuit substrates and circuit substrates with such contact points |
EP1517599A1 (en) * | 2000-02-28 | 2005-03-23 | Sts Atl Corporation | A method of interconnecting opposite sides of an electronic component interconnection device |
FR2834180A1 (en) * | 2001-12-20 | 2003-06-27 | Org Europeene De Rech | Production of a multi layer module for high-density printed circuits comprises anisotropically etching micro holes through a metal-coated polyimide film |
WO2003055288A1 (en) * | 2001-12-20 | 2003-07-03 | Organisation Europeenne Pour La Recherche Nucleaire | Method for making a multilayer module with high-density printed circuits |
US7135119B2 (en) | 2001-12-20 | 2006-11-14 | Organisation Europeenne Pour La Recherche Nucleaire | Method for making a multilayer module with high-density printed circuits |
US11134575B2 (en) * | 2019-09-30 | 2021-09-28 | Gentherm Gmbh | Dual conductor laminated substrate |
US11744023B2 (en) | 2019-09-30 | 2023-08-29 | Gentherm Gmbh | Dual conductor laminated substrate |
Also Published As
Publication number | Publication date |
---|---|
NL6601794A (en) | 1966-08-15 |
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