FR96065E - Procédé de gravure précise de semiconducteurs. - Google Patents

Procédé de gravure précise de semiconducteurs.

Info

Publication number
FR96065E
FR96065E FR172255A FR96065DA FR96065E FR 96065 E FR96065 E FR 96065E FR 172255 A FR172255 A FR 172255A FR 96065D A FR96065D A FR 96065DA FR 96065 E FR96065 E FR 96065E
Authority
FR
France
Prior art keywords
etching process
semiconductor etching
precise semiconductor
precise
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR172255A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Publication date
Application granted granted Critical
Publication of FR96065E publication Critical patent/FR96065E/fr
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H01L21/30608—Anisotropic liquid etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/051—Etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/115—Orientation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Weting (AREA)
FR172255A 1967-11-01 Procédé de gravure précise de semiconducteurs. Expired FR96065E (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US67981867A 1967-11-01 1967-11-01

Publications (1)

Publication Number Publication Date
FR96065E true FR96065E (fr) 1972-05-19

Family

ID=24728489

Family Applications (1)

Application Number Title Priority Date Filing Date
FR172255A Expired FR96065E (fr) 1967-11-01 Procédé de gravure précise de semiconducteurs.

Country Status (7)

Country Link
US (1) US3506509A (fr)
BE (1) BE723234A (fr)
FR (1) FR96065E (fr)
GB (1) GB1250653A (fr)
MY (1) MY7300448A (fr)
NL (1) NL152115B (fr)
SE (1) SE353185B (fr)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3770533A (en) * 1971-07-02 1973-11-06 Philips Corp Method of producing high resolution patterns in single crystals
US3909325A (en) * 1974-06-28 1975-09-30 Motorola Inc Polycrystalline etch
US4137123A (en) * 1975-12-31 1979-01-30 Motorola, Inc. Texture etching of silicon: method
US4859280A (en) * 1986-12-01 1989-08-22 Harris Corporation Method of etching silicon by enhancing silicon etching capability of alkali hydroxide through the addition of positive valence impurity ions
US4810557A (en) * 1988-03-03 1989-03-07 American Telephone And Telegraph Company, At&T Bell Laboratories Method of making an article comprising a tandem groove, and article produced by the method
US4918030A (en) * 1989-03-31 1990-04-17 Electric Power Research Institute Method of forming light-trapping surface for photovoltaic cell and resulting structure
DE3920644C1 (fr) * 1989-06-23 1990-12-20 Fraunhofer-Gesellschaft Zur Foerderung Der Angewandten Forschung Ev, 8000 Muenchen, De
US5431777A (en) * 1992-09-17 1995-07-11 International Business Machines Corporation Methods and compositions for the selective etching of silicon
DE19811878C2 (de) * 1998-03-18 2002-09-19 Siemens Solar Gmbh Verfahren und Ätzlösung zum naßchemischen pyramidalen Texturätzen von Siliziumoberflächen
US6326689B1 (en) * 1999-07-26 2001-12-04 Stmicroelectronics, Inc. Backside contact for touchchip
KR101010531B1 (ko) * 2006-05-02 2011-01-24 스페이스 에너지 가부시키가이샤 반도체기판의 제조방법, 솔라용 반도체기판 및 에칭액

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL105904C (fr) * 1955-12-30
US3041226A (en) * 1958-04-02 1962-06-26 Hughes Aircraft Co Method of preparing semiconductor crystals
US3425879A (en) * 1965-10-24 1969-02-04 Texas Instruments Inc Method of making shaped epitaxial deposits

Also Published As

Publication number Publication date
US3506509A (en) 1970-04-14
NL6815372A (fr) 1969-05-05
DE1806225A1 (de) 1971-01-28
BE723234A (fr) 1969-04-01
SE353185B (fr) 1973-01-22
NL152115B (nl) 1977-01-17
DE1806225B2 (de) 1972-08-24
GB1250653A (fr) 1971-10-20
MY7300448A (en) 1973-12-31

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