FR2985839B1 - Circuit et procede pour detecter une difference de tension sur une paire de lignes de signal duales, en particulier par un transistor d'egalisation - Google Patents

Circuit et procede pour detecter une difference de tension sur une paire de lignes de signal duales, en particulier par un transistor d'egalisation

Info

Publication number
FR2985839B1
FR2985839B1 FR1250398A FR1250398A FR2985839B1 FR 2985839 B1 FR2985839 B1 FR 2985839B1 FR 1250398 A FR1250398 A FR 1250398A FR 1250398 A FR1250398 A FR 1250398A FR 2985839 B1 FR2985839 B1 FR 2985839B1
Authority
FR
France
Prior art keywords
pair
circuit
signal lines
voltage difference
detecting voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1250398A
Other languages
English (en)
Other versions
FR2985839A1 (fr
Inventor
Richard Ferrant
Roland Thewes
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec SA filed Critical Soitec SA
Priority to FR1250398A priority Critical patent/FR2985839B1/fr
Priority to TW102100129A priority patent/TWI558162B/zh
Priority to US14/372,345 priority patent/US9390771B2/en
Priority to SG11201403981QA priority patent/SG11201403981QA/en
Priority to PCT/EP2013/050760 priority patent/WO2013107779A1/fr
Priority to CN201380005532.8A priority patent/CN104081461B/zh
Priority to KR1020147022383A priority patent/KR101565375B1/ko
Publication of FR2985839A1 publication Critical patent/FR2985839A1/fr
Application granted granted Critical
Publication of FR2985839B1 publication Critical patent/FR2985839B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/062Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/08Control thereof
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4091Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4094Bit-line management or control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2211/00Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/401Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C2211/4016Memory devices with silicon-on-insulator cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Manipulation Of Pulses (AREA)
FR1250398A 2012-01-16 2012-01-16 Circuit et procede pour detecter une difference de tension sur une paire de lignes de signal duales, en particulier par un transistor d'egalisation Active FR2985839B1 (fr)

Priority Applications (7)

Application Number Priority Date Filing Date Title
FR1250398A FR2985839B1 (fr) 2012-01-16 2012-01-16 Circuit et procede pour detecter une difference de tension sur une paire de lignes de signal duales, en particulier par un transistor d'egalisation
TW102100129A TWI558162B (zh) 2012-01-16 2013-01-03 通過等化電晶體之用於在一對雙訊號線上感測一電壓差之電路及方法
SG11201403981QA SG11201403981QA (en) 2012-01-16 2013-01-16 Circuit and method for sensing a difference in voltage on a pair of dual signal lines, in particular through equalize transistor
PCT/EP2013/050760 WO2013107779A1 (fr) 2012-01-16 2013-01-16 Circuit et procédé destinés à détecter une différence de tension sur une paire de lignes de doubles signaux, en particulier grâce à un transistor d'égalisation
US14/372,345 US9390771B2 (en) 2012-01-16 2013-01-16 Circuit and method for sensing a difference in voltage on a pair of dual signal lines, in particular through equalize transistor
CN201380005532.8A CN104081461B (zh) 2012-01-16 2013-01-16 尤其通过平衡晶体管感测一对双信号线上的电压差的电路和方法
KR1020147022383A KR101565375B1 (ko) 2012-01-16 2013-01-16 등화 트랜지스터를 통한 이중 신호라인 한 쌍의 전압차이를 감지하는 회로 및 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1250398A FR2985839B1 (fr) 2012-01-16 2012-01-16 Circuit et procede pour detecter une difference de tension sur une paire de lignes de signal duales, en particulier par un transistor d'egalisation

Publications (2)

Publication Number Publication Date
FR2985839A1 FR2985839A1 (fr) 2013-07-19
FR2985839B1 true FR2985839B1 (fr) 2014-02-07

Family

ID=47628115

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1250398A Active FR2985839B1 (fr) 2012-01-16 2012-01-16 Circuit et procede pour detecter une difference de tension sur une paire de lignes de signal duales, en particulier par un transistor d'egalisation

Country Status (7)

Country Link
US (1) US9390771B2 (fr)
KR (1) KR101565375B1 (fr)
CN (1) CN104081461B (fr)
FR (1) FR2985839B1 (fr)
SG (1) SG11201403981QA (fr)
TW (1) TWI558162B (fr)
WO (1) WO2013107779A1 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102292233B1 (ko) * 2015-02-13 2021-08-24 삼성전자주식회사 메모리 장치, 이를 포함하는 메모리 모듈, 및 메모리 시스템
US9830979B1 (en) * 2016-05-26 2017-11-28 Taiwan Semiconductor Manufacturing Company Limited Systems and methods for controlling a sense amplifier
CN107884666A (zh) * 2017-12-14 2018-04-06 威胜信息技术股份有限公司 Mbus总线短路检测电路及其检测方法
CN115994566B (zh) * 2022-12-15 2023-07-28 香港科技大学 电子单元阵列及人工神经网络

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB8917835D0 (en) * 1989-08-04 1989-09-20 Inmos Ltd Current sensing amplifier for a memory
US5327317A (en) * 1991-12-13 1994-07-05 Micron Technology, Inc. Self-terminating data line driver
US5568073A (en) * 1993-12-22 1996-10-22 Sgs-Thomson Microelectronics, Inc. Data comparing sense amplifier
US5453951A (en) * 1994-08-26 1995-09-26 Townsend And Townsend Khourie And Crew Fast voltage equilibration of complementary data lines following write cycle in memory circuits
US5936905A (en) * 1996-09-03 1999-08-10 Townsend And Townsend And Crew Llp Self adjusting delay circuit and method for compensating sense amplifier clock timing
JP3918248B2 (ja) * 1997-09-26 2007-05-23 ソニー株式会社 固体撮像素子およびその駆動方法
US6473349B1 (en) * 2001-11-29 2002-10-29 Motorola, Inc. Cascode sense AMP and column select circuit and method of operation
JP4278414B2 (ja) * 2003-03-18 2009-06-17 株式会社ルネサステクノロジ 半導体記憶装置
JP2011096950A (ja) 2009-10-30 2011-05-12 Elpida Memory Inc 半導体装置、センスアンプ回路、半導体装置の制御方法及びセンスアンプ回路の制御方法
FR2957449B1 (fr) 2010-03-11 2022-07-15 S O I Tec Silicon On Insulator Tech Micro-amplificateur de lecture pour memoire
FR2974656B1 (fr) 2011-04-26 2013-05-17 Soitec Silicon On Insulator Amplificateur de detection differentiel sans transistor a grille de passage dedie
FR2974666B1 (fr) 2011-04-26 2013-05-17 Soitec Silicon On Insulator Amplificateur de detection differentiel sans transistor de precharge dedie
FR2974667B1 (fr) 2011-04-26 2020-10-02 S O I Tec Silicon On Insulator Tech Amplificateur de detection differentiel sans transistor de commutation
FR2982700B1 (fr) * 2011-11-15 2014-02-07 Soitec Silicon On Insulator Amplificateur de lecture avec transistors de precharge et de decodage a grille double

Also Published As

Publication number Publication date
WO2013107779A8 (fr) 2014-02-13
US9390771B2 (en) 2016-07-12
KR101565375B1 (ko) 2015-11-03
US20140376318A1 (en) 2014-12-25
WO2013107779A1 (fr) 2013-07-25
TWI558162B (zh) 2016-11-11
KR20140120910A (ko) 2014-10-14
FR2985839A1 (fr) 2013-07-19
CN104081461A (zh) 2014-10-01
SG11201403981QA (en) 2014-08-28
TW201333967A (zh) 2013-08-16
CN104081461B (zh) 2017-07-11

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