FR2890782B1 - Dispositif semi-conducteur comprenant au moins un transistor mos comprenant une couche d'arret de gravure et procede de fabrication correspondant. - Google Patents
Dispositif semi-conducteur comprenant au moins un transistor mos comprenant une couche d'arret de gravure et procede de fabrication correspondant.Info
- Publication number
- FR2890782B1 FR2890782B1 FR0509392A FR0509392A FR2890782B1 FR 2890782 B1 FR2890782 B1 FR 2890782B1 FR 0509392 A FR0509392 A FR 0509392A FR 0509392 A FR0509392 A FR 0509392A FR 2890782 B1 FR2890782 B1 FR 2890782B1
- Authority
- FR
- France
- Prior art keywords
- semiconductor device
- mos transistor
- fabrication method
- stopping layer
- etch stopping
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
- H01L27/0922—Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
- H01L29/7843—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being an applied insulating layer
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0509392A FR2890782B1 (fr) | 2005-09-14 | 2005-09-14 | Dispositif semi-conducteur comprenant au moins un transistor mos comprenant une couche d'arret de gravure et procede de fabrication correspondant. |
US11/517,801 US7528030B2 (en) | 2005-09-14 | 2006-09-08 | Semiconductor device comprising at least one MOS transistor having an etch stop layer, and corresponding fabrication process |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0509392A FR2890782B1 (fr) | 2005-09-14 | 2005-09-14 | Dispositif semi-conducteur comprenant au moins un transistor mos comprenant une couche d'arret de gravure et procede de fabrication correspondant. |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2890782A1 FR2890782A1 (fr) | 2007-03-16 |
FR2890782B1 true FR2890782B1 (fr) | 2008-02-29 |
Family
ID=36500523
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0509392A Expired - Fee Related FR2890782B1 (fr) | 2005-09-14 | 2005-09-14 | Dispositif semi-conducteur comprenant au moins un transistor mos comprenant une couche d'arret de gravure et procede de fabrication correspondant. |
Country Status (2)
Country | Link |
---|---|
US (1) | US7528030B2 (fr) |
FR (1) | FR2890782B1 (fr) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102007025342B4 (de) * | 2007-05-31 | 2011-07-28 | Globalfoundries Inc. | Höheres Transistorleistungsvermögen von N-Kanaltransistoren und P-Kanaltransistoren durch Verwenden einer zusätzlichen Schicht über einer Doppelverspannungsschicht |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4173672B2 (ja) * | 2002-03-19 | 2008-10-29 | 株式会社ルネサステクノロジ | 半導体装置及びその製造方法 |
JP4636785B2 (ja) * | 2003-08-28 | 2011-02-23 | パナソニック株式会社 | 半導体装置及びその製造方法 |
US6939814B2 (en) * | 2003-10-30 | 2005-09-06 | International Business Machines Corporation | Increasing carrier mobility in NFET and PFET transistors on a common wafer |
TWI234188B (en) * | 2004-08-18 | 2005-06-11 | Ind Tech Res Inst | Method for fabricating semiconductor device |
US7232730B2 (en) * | 2005-04-29 | 2007-06-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming a locally strained transistor |
US7528028B2 (en) * | 2005-06-17 | 2009-05-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Super anneal for process induced strain modulation |
-
2005
- 2005-09-14 FR FR0509392A patent/FR2890782B1/fr not_active Expired - Fee Related
-
2006
- 2006-09-08 US US11/517,801 patent/US7528030B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US20070069256A1 (en) | 2007-03-29 |
US7528030B2 (en) | 2009-05-05 |
FR2890782A1 (fr) | 2007-03-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |
Effective date: 20140530 |