FR2890782B1 - Dispositif semi-conducteur comprenant au moins un transistor mos comprenant une couche d'arret de gravure et procede de fabrication correspondant. - Google Patents

Dispositif semi-conducteur comprenant au moins un transistor mos comprenant une couche d'arret de gravure et procede de fabrication correspondant.

Info

Publication number
FR2890782B1
FR2890782B1 FR0509392A FR0509392A FR2890782B1 FR 2890782 B1 FR2890782 B1 FR 2890782B1 FR 0509392 A FR0509392 A FR 0509392A FR 0509392 A FR0509392 A FR 0509392A FR 2890782 B1 FR2890782 B1 FR 2890782B1
Authority
FR
France
Prior art keywords
semiconductor device
mos transistor
fabrication method
stopping layer
etch stopping
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0509392A
Other languages
English (en)
Other versions
FR2890782A1 (fr
Inventor
Pierre Morin
Catherine Chaton
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Crolles 2 SAS
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
STMicroelectronics Crolles 2 SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, STMicroelectronics Crolles 2 SAS filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR0509392A priority Critical patent/FR2890782B1/fr
Priority to US11/517,801 priority patent/US7528030B2/en
Publication of FR2890782A1 publication Critical patent/FR2890782A1/fr
Application granted granted Critical
Publication of FR2890782B1 publication Critical patent/FR2890782B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0922Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823807Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7842Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
    • H01L29/7843Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being an applied insulating layer
FR0509392A 2005-09-14 2005-09-14 Dispositif semi-conducteur comprenant au moins un transistor mos comprenant une couche d'arret de gravure et procede de fabrication correspondant. Expired - Fee Related FR2890782B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0509392A FR2890782B1 (fr) 2005-09-14 2005-09-14 Dispositif semi-conducteur comprenant au moins un transistor mos comprenant une couche d'arret de gravure et procede de fabrication correspondant.
US11/517,801 US7528030B2 (en) 2005-09-14 2006-09-08 Semiconductor device comprising at least one MOS transistor having an etch stop layer, and corresponding fabrication process

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0509392A FR2890782B1 (fr) 2005-09-14 2005-09-14 Dispositif semi-conducteur comprenant au moins un transistor mos comprenant une couche d'arret de gravure et procede de fabrication correspondant.

Publications (2)

Publication Number Publication Date
FR2890782A1 FR2890782A1 (fr) 2007-03-16
FR2890782B1 true FR2890782B1 (fr) 2008-02-29

Family

ID=36500523

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0509392A Expired - Fee Related FR2890782B1 (fr) 2005-09-14 2005-09-14 Dispositif semi-conducteur comprenant au moins un transistor mos comprenant une couche d'arret de gravure et procede de fabrication correspondant.

Country Status (2)

Country Link
US (1) US7528030B2 (fr)
FR (1) FR2890782B1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102007025342B4 (de) * 2007-05-31 2011-07-28 Globalfoundries Inc. Höheres Transistorleistungsvermögen von N-Kanaltransistoren und P-Kanaltransistoren durch Verwenden einer zusätzlichen Schicht über einer Doppelverspannungsschicht

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4173672B2 (ja) * 2002-03-19 2008-10-29 株式会社ルネサステクノロジ 半導体装置及びその製造方法
JP4636785B2 (ja) * 2003-08-28 2011-02-23 パナソニック株式会社 半導体装置及びその製造方法
US6939814B2 (en) * 2003-10-30 2005-09-06 International Business Machines Corporation Increasing carrier mobility in NFET and PFET transistors on a common wafer
TWI234188B (en) * 2004-08-18 2005-06-11 Ind Tech Res Inst Method for fabricating semiconductor device
US7232730B2 (en) * 2005-04-29 2007-06-19 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming a locally strained transistor
US7528028B2 (en) * 2005-06-17 2009-05-05 Taiwan Semiconductor Manufacturing Company, Ltd. Super anneal for process induced strain modulation

Also Published As

Publication number Publication date
US20070069256A1 (en) 2007-03-29
US7528030B2 (en) 2009-05-05
FR2890782A1 (fr) 2007-03-16

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Effective date: 20140530