FR2870043A1 - Fabrication de zones actives de natures differentes directement sur isolant et application au transistor mos a simple ou double grille - Google Patents

Fabrication de zones actives de natures differentes directement sur isolant et application au transistor mos a simple ou double grille

Info

Publication number
FR2870043A1
FR2870043A1 FR0450889A FR0450889A FR2870043A1 FR 2870043 A1 FR2870043 A1 FR 2870043A1 FR 0450889 A FR0450889 A FR 0450889A FR 0450889 A FR0450889 A FR 0450889A FR 2870043 A1 FR2870043 A1 FR 2870043A1
Authority
FR
France
Prior art keywords
insulation
semiconductor material
manufacturing
application
mos transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR0450889A
Other languages
English (en)
Other versions
FR2870043B1 (fr
Inventor
Francois Andrieu
Thomas Ernst
Simon Deleonibus
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR0450889A priority Critical patent/FR2870043B1/fr
Priority to US11/579,037 priority patent/US7820523B2/en
Priority to EP04766083.2A priority patent/EP1743375B1/fr
Priority to PCT/EP2004/051255 priority patent/WO2005109509A1/fr
Publication of FR2870043A1 publication Critical patent/FR2870043A1/fr
Application granted granted Critical
Publication of FR2870043B1 publication Critical patent/FR2870043B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76275—Vertical isolation by bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
    • H01L29/045—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes by their particular orientation of crystalline planes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
    • H01L29/78648—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate arranged on opposing sides of the channel
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78684—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S117/00—Single-crystal, oriented-crystal, and epitaxy growth processes; non-coating apparatus therefor
    • Y10S117/915—Separating from substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
  • Element Separation (AREA)

Abstract

L'invention concerne un dispositif microélectronique comprenant un substrat, une première zone isolante et une seconde zone isolante reposant sur ledit substrat, une première zone active comportant au moins une couche en un premier matériau semi-conducteur cristallin, reposant sur ladite première zone isolante qui l'isole du substrat, au moins une deuxième zone active comportant au moins une couche en un second matériau semi-conducteur cristallin, reposant sur ladite seconde zone isolante qui l'isole du substrat, ledit premier matériau semi-conducteur cristallin étant de composition différente du second matériau semi-conducteur cristallin ou/et d'orientation cristallographique différente de celle du second matériau semi-conducteur cristallin ou/et en contrainte mécanique de celle du second matériau semi-conducteur cristallin.
FR0450889A 2004-05-07 2004-05-07 Fabrication de zones actives de natures differentes directement sur isolant et application au transistor mos a simple ou double grille Expired - Lifetime FR2870043B1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR0450889A FR2870043B1 (fr) 2004-05-07 2004-05-07 Fabrication de zones actives de natures differentes directement sur isolant et application au transistor mos a simple ou double grille
US11/579,037 US7820523B2 (en) 2004-05-07 2004-06-25 Fabrication of active areas of different natures directly onto an insulator: application to the single or double gate MOS transistor
EP04766083.2A EP1743375B1 (fr) 2004-05-07 2004-06-25 Production de zones actives de differente nature, directement sur un isolant, et utilisation pour un transistor mos a grille simple ou double
PCT/EP2004/051255 WO2005109509A1 (fr) 2004-05-07 2004-06-25 Production de zones actives de differente nature, directement sur un isolant, et utilisation pour un transistor mos a grille simple ou double

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0450889A FR2870043B1 (fr) 2004-05-07 2004-05-07 Fabrication de zones actives de natures differentes directement sur isolant et application au transistor mos a simple ou double grille

Publications (2)

Publication Number Publication Date
FR2870043A1 true FR2870043A1 (fr) 2005-11-11
FR2870043B1 FR2870043B1 (fr) 2006-11-24

Family

ID=34945997

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0450889A Expired - Lifetime FR2870043B1 (fr) 2004-05-07 2004-05-07 Fabrication de zones actives de natures differentes directement sur isolant et application au transistor mos a simple ou double grille

Country Status (4)

Country Link
US (1) US7820523B2 (fr)
EP (1) EP1743375B1 (fr)
FR (1) FR2870043B1 (fr)
WO (1) WO2005109509A1 (fr)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7308160B2 (en) 2004-08-16 2007-12-11 Lucent Technologies Inc. High speed semiconductor waveguide phase-shifter
US7388278B2 (en) * 2005-03-24 2008-06-17 International Business Machines Corporation High performance field effect transistors on SOI substrate with stress-inducing material as buried insulator and methods
US9153645B2 (en) * 2005-05-17 2015-10-06 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
EP1868233B1 (fr) 2006-06-12 2009-03-11 Commissariat A L'energie Atomique Procédé de réalisation de zones à base de Si1-yGey de différentes teneurs en Ge sur un même substrat par condensation de germanium
FR2902234B1 (fr) 2006-06-12 2008-10-10 Commissariat Energie Atomique PROCEDE DE REALISATION DE ZONES A BASE DE Si1-yGey DE DIFFERENTES TENEURS EN Ge SUR UN MEME SUBSTRAT PAR CONDENSATION DE GERMANIUM
US7759233B2 (en) * 2007-03-23 2010-07-20 Micron Technology, Inc. Methods for stressing semiconductor material structures to improve electron and/or hole mobility of transistor channels fabricated therefrom, and semiconductor devices including such structures
FR2918793B1 (fr) * 2007-07-11 2009-10-09 Commissariat Energie Atomique Procede de fabrication d'un substrat semiconducteur-sur- isolant pour la microelectronique et l'optoelectronique.
US8110874B2 (en) * 2008-03-15 2012-02-07 Kabushiki Kaisha Toshiba Hybrid substrates and method of manufacture
US10170549B2 (en) 2014-10-21 2019-01-01 Samsung Electronics Co., Ltd. Strained stacked nanosheet FETs and/or quantum well stacked nanosheet
FR3030882B1 (fr) * 2014-12-22 2018-03-09 Commissariat A L'energie Atomique Et Aux Energies Alternatives Circuit integre comportant des transistors pmos a tensions de seuil distinctes
US10361219B2 (en) 2015-06-30 2019-07-23 International Business Machines Corporation Implementing a hybrid finFET device and nanowire device utilizing selective SGOI
CN111029342B (zh) 2019-11-07 2024-04-16 深圳市华星光电半导体显示技术有限公司 显示面板及其制备方法、显示装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0331811A2 (fr) * 1987-12-18 1989-09-13 Fujitsu Limited Dispositifs semi-conducteurs du type silicium-sur-isolant (SOI)
US20020140031A1 (en) * 2001-03-31 2002-10-03 Kern Rim Strained silicon on insulator structures
US20020171077A1 (en) * 1998-03-02 2002-11-21 Chu Jack Oon Si/SiGe optoelectronic integrated circuits
US6600170B1 (en) * 2001-12-17 2003-07-29 Advanced Micro Devices, Inc. CMOS with strained silicon channel NMOS and silicon germanium channel PMOS

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JP3175188B2 (ja) 1991-05-10 2001-06-11 ソニー株式会社 位置合わせマークの形成方法
FR2681472B1 (fr) 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
US5882987A (en) 1997-08-26 1999-03-16 International Business Machines Corporation Smart-cut process for the production of thin semiconductor material films
JP3762221B2 (ja) 1998-04-10 2006-04-05 マサチューセッツ・インスティテュート・オブ・テクノロジー シリコンゲルマニウムエッチング停止層システム
US6602613B1 (en) 2000-01-20 2003-08-05 Amberwave Systems Corporation Heterointegration of materials using deposition and bonding
FR2810447B1 (fr) 2000-06-16 2003-09-05 Commissariat Energie Atomique Procede de creation d'un etage de circuit integre ou conexistent des motifs fins et larges
US6524935B1 (en) 2000-09-29 2003-02-25 International Business Machines Corporation Preparation of strained Si/SiGe on insulator by hydrogen induced layer transfer technique
US6593641B1 (en) 2001-03-02 2003-07-15 Amberwave Systems Corporation Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
US6900094B2 (en) 2001-06-14 2005-05-31 Amberwave Systems Corporation Method of selective removal of SiGe alloys
US6717213B2 (en) * 2001-06-29 2004-04-06 Intel Corporation Creation of high mobility channels in thin-body SOI devices
JP3782021B2 (ja) * 2002-02-22 2006-06-07 株式会社東芝 半導体装置、半導体装置の製造方法、半導体基板の製造方法
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Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0331811A2 (fr) * 1987-12-18 1989-09-13 Fujitsu Limited Dispositifs semi-conducteurs du type silicium-sur-isolant (SOI)
US20020171077A1 (en) * 1998-03-02 2002-11-21 Chu Jack Oon Si/SiGe optoelectronic integrated circuits
US20020140031A1 (en) * 2001-03-31 2002-10-03 Kern Rim Strained silicon on insulator structures
US6600170B1 (en) * 2001-12-17 2003-07-29 Advanced Micro Devices, Inc. CMOS with strained silicon channel NMOS and silicon germanium channel PMOS

Also Published As

Publication number Publication date
EP1743375A1 (fr) 2007-01-17
FR2870043B1 (fr) 2006-11-24
US20070246702A1 (en) 2007-10-25
WO2005109509A1 (fr) 2005-11-17
US7820523B2 (en) 2010-10-26
EP1743375B1 (fr) 2016-12-14

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