FR2819143B1 - Procede de realisation de plots de connexion sur un circuit imprime - Google Patents
Procede de realisation de plots de connexion sur un circuit imprimeInfo
- Publication number
- FR2819143B1 FR2819143B1 FR0017230A FR0017230A FR2819143B1 FR 2819143 B1 FR2819143 B1 FR 2819143B1 FR 0017230 A FR0017230 A FR 0017230A FR 0017230 A FR0017230 A FR 0017230A FR 2819143 B1 FR2819143 B1 FR 2819143B1
- Authority
- FR
- France
- Prior art keywords
- printed circuit
- making connection
- plots
- connection plots
- making
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3473—Plating of solder
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
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- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
- Manufacturing Of Printed Wiring (AREA)
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0017230A FR2819143B1 (fr) | 2000-12-28 | 2000-12-28 | Procede de realisation de plots de connexion sur un circuit imprime |
KR1020027011250A KR20020089367A (ko) | 2000-12-28 | 2001-12-20 | 인쇄회로상에 본드 패드를 형성하는 방법 |
JP2002555597A JP2004517500A (ja) | 2000-12-28 | 2001-12-20 | 印刷回路の上に接続バンプを生成する方法 |
US10/204,561 US20030013045A1 (en) | 2000-12-28 | 2001-12-20 | Method for producing bond pads on a printed circuit |
EP01989644A EP1262094A1 (fr) | 2000-12-28 | 2001-12-20 | Procede de realisation de plots de connexion sur un circuit imprime |
PCT/FR2001/004117 WO2002054842A1 (fr) | 2000-12-28 | 2001-12-20 | Procede de realisation de plots de connexion sur un circuit imprime |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0017230A FR2819143B1 (fr) | 2000-12-28 | 2000-12-28 | Procede de realisation de plots de connexion sur un circuit imprime |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2819143A1 FR2819143A1 (fr) | 2002-07-05 |
FR2819143B1 true FR2819143B1 (fr) | 2003-03-07 |
Family
ID=8858350
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0017230A Expired - Fee Related FR2819143B1 (fr) | 2000-12-28 | 2000-12-28 | Procede de realisation de plots de connexion sur un circuit imprime |
Country Status (6)
Country | Link |
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US (1) | US20030013045A1 (fr) |
EP (1) | EP1262094A1 (fr) |
JP (1) | JP2004517500A (fr) |
KR (1) | KR20020089367A (fr) |
FR (1) | FR2819143B1 (fr) |
WO (1) | WO2002054842A1 (fr) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8901736B2 (en) * | 2010-05-28 | 2014-12-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strength of micro-bump joints |
WO2016190366A1 (fr) * | 2015-05-27 | 2016-12-01 | 旭硝子株式会社 | Composition d'agent hydrofuge et oléofuge ainsi que procédé de production et article associés |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5024734A (en) * | 1989-12-27 | 1991-06-18 | Westinghouse Electric Corp. | Solder pad/circuit trace interface and a method for generating the same |
FR2666173A1 (fr) * | 1990-08-21 | 1992-02-28 | Thomson Csf | Structure hybride d'interconnexion de circuits integres et procede de fabrication. |
US5376584A (en) * | 1992-12-31 | 1994-12-27 | International Business Machines Corporation | Process of making pad structure for solder ball limiting metallurgy having reduced edge stress |
FR2701602B1 (fr) * | 1993-02-12 | 1995-03-31 | Thomson Csf | Détecteur thermique comprenant un isolant thermique en polymère expansé. |
US5480835A (en) * | 1993-05-06 | 1996-01-02 | Motorola, Inc. | Electrical interconnect and method for forming the same |
JPH0845941A (ja) * | 1994-08-03 | 1996-02-16 | Oki Electric Ind Co Ltd | 半導体装置バンプの形成方法 |
US5800726A (en) * | 1995-07-26 | 1998-09-01 | International Business Machines Corporation | Selective chemical etching in microelectronics fabrication |
FR2740933B1 (fr) * | 1995-11-03 | 1997-11-28 | Thomson Csf | Sonde acoustique et procede de realisation |
FR2745973B1 (fr) * | 1996-03-08 | 1998-04-03 | Thomson Csf | Memoire de masse et procede de fabrication de memoire de masse |
JP3352352B2 (ja) * | 1997-03-31 | 2002-12-03 | 新光電気工業株式会社 | めっき装置、めっき方法およびバンプの形成方法 |
US6293457B1 (en) * | 2000-06-08 | 2001-09-25 | International Business Machines Corporation | Integrated method for etching of BLM titanium-tungsten alloys for CMOS devices with copper metallization |
US6586322B1 (en) * | 2001-12-21 | 2003-07-01 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of making a bump on a substrate using multiple photoresist layers |
US6696356B2 (en) * | 2001-12-31 | 2004-02-24 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of making a bump on a substrate without ribbon residue |
-
2000
- 2000-12-28 FR FR0017230A patent/FR2819143B1/fr not_active Expired - Fee Related
-
2001
- 2001-12-20 EP EP01989644A patent/EP1262094A1/fr not_active Withdrawn
- 2001-12-20 KR KR1020027011250A patent/KR20020089367A/ko not_active Application Discontinuation
- 2001-12-20 WO PCT/FR2001/004117 patent/WO2002054842A1/fr not_active Application Discontinuation
- 2001-12-20 JP JP2002555597A patent/JP2004517500A/ja not_active Withdrawn
- 2001-12-20 US US10/204,561 patent/US20030013045A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
EP1262094A1 (fr) | 2002-12-04 |
FR2819143A1 (fr) | 2002-07-05 |
JP2004517500A (ja) | 2004-06-10 |
WO2002054842A1 (fr) | 2002-07-11 |
KR20020089367A (ko) | 2002-11-29 |
US20030013045A1 (en) | 2003-01-16 |
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