FR2782842B1 - Dispositif comportant des composants electroniques dans des regions mutuellement insolees d'une couche de materiau semi-conducteur et procede de fabrication d'un tel dispositif - Google Patents
Dispositif comportant des composants electroniques dans des regions mutuellement insolees d'une couche de materiau semi-conducteur et procede de fabrication d'un tel dispositifInfo
- Publication number
- FR2782842B1 FR2782842B1 FR9810686A FR9810686A FR2782842B1 FR 2782842 B1 FR2782842 B1 FR 2782842B1 FR 9810686 A FR9810686 A FR 9810686A FR 9810686 A FR9810686 A FR 9810686A FR 2782842 B1 FR2782842 B1 FR 2782842B1
- Authority
- FR
- France
- Prior art keywords
- insole
- regions
- mutually
- manufacturing
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76286—Lateral isolation by refilling of trenches with polycristalline material
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9810686A FR2782842B1 (fr) | 1998-08-25 | 1998-08-25 | Dispositif comportant des composants electroniques dans des regions mutuellement insolees d'une couche de materiau semi-conducteur et procede de fabrication d'un tel dispositif |
EP99939493A EP1114453A1 (fr) | 1998-08-25 | 1999-08-24 | Dispositif comportant des composants electroniques dans des regions mutuellement isolees d'une couche de materiau semi-conducteur et procede de fabrication d'un tel dispositif |
PCT/FR1999/002032 WO2000011711A1 (fr) | 1998-08-25 | 1999-08-24 | Dispositif comportant des composants electroniques dans des regions mutuellement isolees d'une couche de materiau semi-conducteur et procede de fabrication d'un tel dispositif |
US10/313,236 US20030064568A1 (en) | 1998-08-25 | 2002-12-05 | Device comprising electronic components in regions of a layer of semiconducting material insulated from each other and manufacturing process for such a device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9810686A FR2782842B1 (fr) | 1998-08-25 | 1998-08-25 | Dispositif comportant des composants electroniques dans des regions mutuellement insolees d'une couche de materiau semi-conducteur et procede de fabrication d'un tel dispositif |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2782842A1 FR2782842A1 (fr) | 2000-03-03 |
FR2782842B1 true FR2782842B1 (fr) | 2003-09-05 |
Family
ID=9529863
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR9810686A Expired - Fee Related FR2782842B1 (fr) | 1998-08-25 | 1998-08-25 | Dispositif comportant des composants electroniques dans des regions mutuellement insolees d'une couche de materiau semi-conducteur et procede de fabrication d'un tel dispositif |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP1114453A1 (fr) |
FR (1) | FR2782842B1 (fr) |
WO (1) | WO2000011711A1 (fr) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR3046247B1 (fr) * | 2015-12-28 | 2018-06-15 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Circuit integre pour detection d’un defaut d’isolation avec une armature conductrice |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5423388A (en) * | 1977-07-22 | 1979-02-21 | Hitachi Ltd | Semiconductor integrated-circuit device and its manufacture |
GB2107926A (en) * | 1981-10-13 | 1983-05-05 | Monolithic Memories Inc | Semiconductor device and method of manufacture |
JPS58138049A (ja) * | 1982-02-12 | 1983-08-16 | Mitsubishi Electric Corp | 半導体集積回路の製造方法 |
JPH04123456A (ja) * | 1990-09-14 | 1992-04-23 | Hitachi Ltd | 半導体装置及びその製造方法 |
JP3180599B2 (ja) * | 1995-01-24 | 2001-06-25 | 日本電気株式会社 | 半導体装置およびその製造方法 |
US5899727A (en) * | 1996-05-02 | 1999-05-04 | Advanced Micro Devices, Inc. | Method of making a semiconductor isolation region bounded by a trench and covered with an oxide to improve planarization |
-
1998
- 1998-08-25 FR FR9810686A patent/FR2782842B1/fr not_active Expired - Fee Related
-
1999
- 1999-08-24 WO PCT/FR1999/002032 patent/WO2000011711A1/fr not_active Application Discontinuation
- 1999-08-24 EP EP99939493A patent/EP1114453A1/fr not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
WO2000011711A1 (fr) | 2000-03-02 |
EP1114453A1 (fr) | 2001-07-11 |
FR2782842A1 (fr) | 2000-03-03 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |