FR2752330B1 - Procede d'elimination de contaminants metalliques d'un substrat simox - Google Patents

Procede d'elimination de contaminants metalliques d'un substrat simox

Info

Publication number
FR2752330B1
FR2752330B1 FR9709036A FR9709036A FR2752330B1 FR 2752330 B1 FR2752330 B1 FR 2752330B1 FR 9709036 A FR9709036 A FR 9709036A FR 9709036 A FR9709036 A FR 9709036A FR 2752330 B1 FR2752330 B1 FR 2752330B1
Authority
FR
France
Prior art keywords
removal
metal contaminants
simox substrate
simox
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9709036A
Other languages
English (en)
Other versions
FR2752330A1 (fr
Inventor
Ensuke Okonogi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of FR2752330A1 publication Critical patent/FR2752330A1/fr
Application granted granted Critical
Publication of FR2752330B1 publication Critical patent/FR2752330B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26533Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically inactive species in silicon to make buried insulating layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Power Engineering (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Element Separation (AREA)
  • Semiconductor Memories (AREA)
  • Recrystallisation Techniques (AREA)
FR9709036A 1996-07-16 1997-07-16 Procede d'elimination de contaminants metalliques d'un substrat simox Expired - Fee Related FR2752330B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8185838A JP2856157B2 (ja) 1996-07-16 1996-07-16 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
FR2752330A1 FR2752330A1 (fr) 1998-02-13
FR2752330B1 true FR2752330B1 (fr) 2003-10-03

Family

ID=16177770

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9709036A Expired - Fee Related FR2752330B1 (fr) 1996-07-16 1997-07-16 Procede d'elimination de contaminants metalliques d'un substrat simox

Country Status (3)

Country Link
US (1) US5970366A (fr)
JP (1) JP2856157B2 (fr)
FR (1) FR2752330B1 (fr)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1197377A (ja) * 1997-09-24 1999-04-09 Nec Corp Soi基板の製造方法
US6211095B1 (en) * 1998-12-23 2001-04-03 Agilent Technologies, Inc. Method for relieving lattice mismatch stress in semiconductor devices
JP2000294549A (ja) * 1999-02-02 2000-10-20 Nec Corp 半導体装置及びその製造方法
US7232742B1 (en) * 1999-11-26 2007-06-19 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a semiconductor device that includes forming a material with a high tensile stress in contact with a semiconductor film to getter impurities from the semiconductor film
US6821827B2 (en) * 1999-12-28 2004-11-23 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a semiconductor device
US6620632B2 (en) 2000-04-06 2003-09-16 Seh America, Inc. Method for evaluating impurity concentrations in semiconductor substrates
EP1229068B1 (fr) * 2001-02-06 2005-09-14 Shibuya Kogyo Co., Ltd. Méthode et dispositif pour modifier la surface intérieure de récipients en plastique
US6780693B2 (en) * 2001-12-29 2004-08-24 Lg.Philips Lcd Co., Ltd. Method of fabricating polysilicon thin film transistor
US7294561B2 (en) * 2003-08-14 2007-11-13 Ibis Technology Corporation Internal gettering in SIMOX SOI silicon substrates
JP4876442B2 (ja) 2005-06-13 2012-02-15 株式会社Sumco Simoxウェーハの製造方法およびsimoxウェーハ
JP4992246B2 (ja) * 2006-02-22 2012-08-08 株式会社Sumco シリコンウェーハ中のCu評価方法
JP5654206B2 (ja) * 2008-03-26 2015-01-14 株式会社半導体エネルギー研究所 Soi基板の作製方法及び該soi基板を用いた半導体装置
US9060572B2 (en) 2010-07-26 2015-06-23 Ykk Corporation Button fixing member and button structure
KR102172272B1 (ko) * 2016-02-26 2020-10-30 엔비스아나(주) 기판 오염물 분석 장치 및 기판 오염물 분석 방법

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60176241A (ja) * 1984-02-23 1985-09-10 Nec Corp 半導体基板の製造方法
FR2581795B1 (fr) * 1985-05-10 1988-06-17 Golanski Andrzej Procede de fabrication d'une couche isolante continue enterree dans un substrat semi-conducteur, par implantation ionique
JPH01235242A (ja) * 1988-03-15 1989-09-20 Fujitsu Ltd 半導体装置の製造方法
JPH0719839B2 (ja) * 1989-10-18 1995-03-06 株式会社東芝 半導体基板の製造方法
JPH0453140A (ja) * 1990-06-18 1992-02-20 Fujitsu Ltd シリコン単結晶ウエハの処理方法
JPH04171827A (ja) * 1990-11-05 1992-06-19 Nec Yamagata Ltd 半導体装置の製造方法
US5244819A (en) * 1991-10-22 1993-09-14 Honeywell Inc. Method to getter contamination in semiconductor devices
US5441899A (en) * 1992-02-18 1995-08-15 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing substrate having semiconductor on insulator
JPH06104268A (ja) * 1992-09-21 1994-04-15 Mitsubishi Electric Corp ゲッタリング効果を持たせた半導体基板およびその製造方法
JP2806277B2 (ja) * 1994-10-13 1998-09-30 日本電気株式会社 半導体装置及びその製造方法

Also Published As

Publication number Publication date
JP2856157B2 (ja) 1999-02-10
JPH1032210A (ja) 1998-02-03
FR2752330A1 (fr) 1998-02-13
US5970366A (en) 1999-10-19

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Legal Events

Date Code Title Description
TP Transmission of property
ST Notification of lapse