FR2705522B1 - Appareil et procédé d'essai de déverminage. - Google Patents

Appareil et procédé d'essai de déverminage.

Info

Publication number
FR2705522B1
FR2705522B1 FR9405898A FR9405898A FR2705522B1 FR 2705522 B1 FR2705522 B1 FR 2705522B1 FR 9405898 A FR9405898 A FR 9405898A FR 9405898 A FR9405898 A FR 9405898A FR 2705522 B1 FR2705522 B1 FR 2705522B1
Authority
FR
France
Prior art keywords
test apparatus
debugging test
debugging
test
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9405898A
Other languages
English (en)
Other versions
FR2705522A1 (fr
Inventor
Gu Sung Kim
Jae Myung Park
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of FR2705522A1 publication Critical patent/FR2705522A1/fr
Application granted granted Critical
Publication of FR2705522B1 publication Critical patent/FR2705522B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
    • G01R31/2863—Contacting devices, e.g. sockets, burn-in boards or mounting fixtures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/04—Housings; Supporting members; Arrangements of terminals
    • G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0433—Sockets for IC's or transistors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00—Constructional details common to different types of electric apparatus
    • H05K7/02—Arrangements of circuit components or wiring on supporting structure
    • H05K7/10—Plug-in assemblages of components, e.g. IC sockets
    • H05K7/1015—Plug-in assemblages of components, e.g. IC sockets having exterior leads
    • H05K7/103—Plug-in assemblages of components, e.g. IC sockets having exterior leads co-operating by sliding, e.g. DIP carriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Environmental & Geological Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
FR9405898A 1993-05-14 1994-05-13 Appareil et procédé d'essai de déverminage. Expired - Fee Related FR2705522B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930008257A KR960011257B1 (ko) 1993-05-14 1993-05-14 번인 소켓 및 이를 사용한 번인 테스트 방법

Publications (2)

Publication Number Publication Date
FR2705522A1 FR2705522A1 (fr) 1994-11-25
FR2705522B1 true FR2705522B1 (fr) 1996-04-05

Family

ID=19355382

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9405898A Expired - Fee Related FR2705522B1 (fr) 1993-05-14 1994-05-13 Appareil et procédé d'essai de déverminage.

Country Status (4)

Country Link
US (1) US5568057A (fr)
JP (1) JP2846813B2 (fr)
KR (1) KR960011257B1 (fr)
FR (1) FR2705522B1 (fr)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU2293095A (en) * 1994-04-18 1995-11-10 Micron Technology, Inc. Method and apparatus for automatically positioning electronic die within component packages
US5808474A (en) * 1994-11-30 1998-09-15 Lsi Logic Corporation Test socket for testing integrated circuit packages
US5874319A (en) * 1996-05-21 1999-02-23 Honeywell Inc. Vacuum die bond for known good die assembly
US5954832A (en) * 1997-03-14 1999-09-21 International Business Machines Corporation Method and system for performing non-standard insitu burn-in testings
US6353326B2 (en) 1998-08-28 2002-03-05 Micron Technology, Inc. Test carrier with molded interconnect for testing semiconductor components
US6560735B1 (en) * 1999-08-03 2003-05-06 Agere Systems Inc Methods and apparatus for testing integrated circuits
EP1074844A3 (fr) * 1999-08-03 2003-08-06 Lucent Technologies Inc. Test de circuits integrés
US7189092B2 (en) * 2004-07-14 2007-03-13 Antares Contech, Inc. Modular semiconductor package testing contactor system
US7602201B2 (en) * 2007-06-22 2009-10-13 Qualitau, Inc. High temperature ceramic socket configured to test packaged semiconductor devices
TWM367467U (en) * 2009-04-13 2009-10-21 Hon Hai Prec Ind Co Ltd Electrical connector
US9832876B2 (en) * 2014-12-18 2017-11-28 Intel Corporation CPU package substrates with removable memory mechanical interfaces
CN112578149B (zh) * 2019-09-30 2022-12-27 苏州联讯仪器有限公司 芯片可靠性测试用老化设备
CN113533928A (zh) * 2020-04-16 2021-10-22 第一检测有限公司 系统级测试设备及系统级测试系统
CN115561611A (zh) * 2021-07-01 2023-01-03 长鑫存储技术有限公司 一种芯片测试用固定装置及固定方法、测试设备

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5180976A (en) * 1987-04-17 1993-01-19 Everett/Charles Contact Products, Inc. Integrated circuit carrier having built-in circuit verification
US5006792A (en) * 1989-03-30 1991-04-09 Texas Instruments Incorporated Flip-chip test socket adaptor and method
JP2727352B2 (ja) * 1989-04-17 1998-03-11 株式会社 新川 リード付き半導体素子の製造方法
US5088190A (en) * 1990-08-30 1992-02-18 Texas Instruments Incorporated Method of forming an apparatus for burn in testing of integrated circuit chip
US5155067A (en) * 1991-03-26 1992-10-13 Micron Technology, Inc. Packaging for a semiconductor die
US5342807A (en) * 1991-06-04 1994-08-30 Micron Technology, Inc. Soft bond for semiconductor dies
US5215472A (en) * 1991-08-22 1993-06-01 Augat Inc. High density grid array socket

Also Published As

Publication number Publication date
JP2846813B2 (ja) 1999-01-13
KR960011257B1 (ko) 1996-08-21
JPH07130920A (ja) 1995-05-19
FR2705522A1 (fr) 1994-11-25
US5568057A (en) 1996-10-22
KR940027116A (ko) 1994-12-10

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20100129