FR2672731A1 - Procede d'oxydation localisee enterree d'un substrat de silicium et circuit integre correspondant. - Google Patents

Procede d'oxydation localisee enterree d'un substrat de silicium et circuit integre correspondant. Download PDF

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Publication number
FR2672731A1
FR2672731A1 FR9101381A FR9101381A FR2672731A1 FR 2672731 A1 FR2672731 A1 FR 2672731A1 FR 9101381 A FR9101381 A FR 9101381A FR 9101381 A FR9101381 A FR 9101381A FR 2672731 A1 FR2672731 A1 FR 2672731A1
Authority
FR
France
Prior art keywords
trench
etching
silicon
substrate
nitriding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR9101381A
Other languages
English (en)
French (fr)
Other versions
FR2672731B1 (oth
Inventor
Straboni Alain
Barla Kathy
Vuillermoz Bernard
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Orange SA
Original Assignee
France Telecom SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by France Telecom SA filed Critical France Telecom SA
Priority to FR9101381A priority Critical patent/FR2672731A1/fr
Priority to EP92400287A priority patent/EP0498717A1/fr
Priority to JP4020246A priority patent/JPH0555367A/ja
Priority to US07/832,078 priority patent/US5229318A/en
Publication of FR2672731A1 publication Critical patent/FR2672731A1/fr
Application granted granted Critical
Publication of FR2672731B1 publication Critical patent/FR2672731B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/61—Formation of materials, e.g. in the shape of layers or pillars of insulating materials using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H10W10/0128—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising multiple local oxidation process steps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6304—Formation by oxidation, e.g. oxidation of the substrate
    • H10P14/6306—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials
    • H10P14/6308—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors
    • H10P14/6309—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors of silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6316—Formation by nitridation, e.g. nitridation of the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6319—Formation by plasma treatments, e.g. plasma oxidation of the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/694—Inorganic materials composed of nitrides
    • H10P14/6943—Inorganic materials composed of nitrides containing silicon
    • H10P14/69433—Inorganic materials composed of nitrides containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/05—Etch and refill

Landscapes

  • Element Separation (AREA)
  • Local Oxidation Of Silicon (AREA)
FR9101381A 1991-02-07 1991-02-07 Procede d'oxydation localisee enterree d'un substrat de silicium et circuit integre correspondant. Granted FR2672731A1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR9101381A FR2672731A1 (fr) 1991-02-07 1991-02-07 Procede d'oxydation localisee enterree d'un substrat de silicium et circuit integre correspondant.
EP92400287A EP0498717A1 (fr) 1991-02-07 1992-02-05 Procédé d'oxydation localisée enterrée d'un substrat de silicium et circuit intégré correspondant
JP4020246A JPH0555367A (ja) 1991-02-07 1992-02-05 シリコン基板の埋め込み選択酸化方法およびこの方法による集積回路
US07/832,078 US5229318A (en) 1991-02-07 1992-02-06 Process for buried localized oxidation of a silicon substrate and corresponding integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9101381A FR2672731A1 (fr) 1991-02-07 1991-02-07 Procede d'oxydation localisee enterree d'un substrat de silicium et circuit integre correspondant.

Publications (2)

Publication Number Publication Date
FR2672731A1 true FR2672731A1 (fr) 1992-08-14
FR2672731B1 FR2672731B1 (oth) 1997-03-07

Family

ID=9409445

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9101381A Granted FR2672731A1 (fr) 1991-02-07 1991-02-07 Procede d'oxydation localisee enterree d'un substrat de silicium et circuit integre correspondant.

Country Status (4)

Country Link
US (1) US5229318A (oth)
EP (1) EP0498717A1 (oth)
JP (1) JPH0555367A (oth)
FR (1) FR2672731A1 (oth)

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KR920022380A (ko) * 1991-05-18 1992-12-19 김광호 반도체장치의 소자분리방법
KR960005553B1 (ko) * 1993-03-31 1996-04-26 현대전자산업주식회사 필드산화막 형성 방법
US5494857A (en) * 1993-07-28 1996-02-27 Digital Equipment Corporation Chemical mechanical planarization of shallow trenches in semiconductor substrates
KR970003731B1 (ko) * 1993-10-14 1997-03-21 엘지반도체 주식회사 반도체 장치의 소자 격리막 제조방법
KR0136518B1 (en) * 1994-04-01 1998-04-24 Hyundai Electroncis Ind Co Ltd Method for forming a field oxide layer
US5470783A (en) * 1994-06-06 1995-11-28 At&T Ipm Corp. Method for integrated circuit device isolation
DE19525072C2 (de) * 1995-07-10 2002-06-27 Infineon Technologies Ag Integrierte Schaltungsanordnung, bei der ein erstes Bauelement an einer Hauptfläche eines Halbleitersubstrats und ein zweites Bauelement am Grabenboden angeordnet sind, und Verfahren zu deren Herstellung
US5661073A (en) * 1995-08-11 1997-08-26 Micron Technology, Inc. Method for forming field oxide having uniform thickness
EE04177B1 (et) * 1995-10-26 2003-12-15 Sanofi 1-(2-naft-2-üületüül)-4-(3-trifluorometüülfenüül)-1,2,3,6-tetrahüdropüridiini kasutamine ravimite valmistamiseks amüotroofilise lateraalskleroosi raviks
US5672538A (en) * 1995-12-04 1997-09-30 Taiwan Semiconductor Manufacturing Company, Ltd Modified locus isolation process in which surface topology of the locos oxide is smoothed
US5726093A (en) * 1995-12-06 1998-03-10 Taiwan Semiconductor Manufacturing Company Ltd. Two-step planer field oxidation method
US5789305A (en) * 1997-01-27 1998-08-04 Chartered Semiconductor Manufacturing Ltd. Locos with bird's beak suppression by a nitrogen implantation
US5721174A (en) * 1997-02-03 1998-02-24 Chartered Semiconductor Manufacturing Pte Ltd Narrow deep trench isolation process with trench filling by oxidation
US6080665A (en) * 1997-04-11 2000-06-27 Applied Materials, Inc. Integrated nitrogen-treated titanium layer to prevent interaction of titanium and aluminum
US6033997A (en) * 1997-12-29 2000-03-07 Siemens Aktiengesellschaft Reduction of black silicon in semiconductor fabrication
US5940718A (en) * 1998-07-20 1999-08-17 Advanced Micro Devices Nitridation assisted polysilicon sidewall protection in self-aligned shallow trench isolation
US6521959B2 (en) * 1999-10-25 2003-02-18 Samsung Electronics Co., Ltd. SOI semiconductor integrated circuit for eliminating floating body effects in SOI MOSFETs and method of fabricating the same
US6613651B1 (en) * 2000-09-05 2003-09-02 Lsi Logic Corporation Integrated circuit isolation system
JP2005183783A (ja) * 2003-12-22 2005-07-07 Seiko Epson Corp 半導体装置の製造方法
DE102004044222A1 (de) * 2004-09-14 2006-03-16 Robert Bosch Gmbh Mikromechanisches Bauelement und entsprechendes Herstellungsverfahren
US8772902B2 (en) 2012-04-19 2014-07-08 International Business Machines Corporation Fabrication of a localized thick box with planar oxide/SOI interface on bulk silicon substrate for silicon photonics integration
US9105686B2 (en) 2012-11-02 2015-08-11 International Business Machines Corporation Fabrication of localized SOI on localized thick box using selective epitaxy on bulk semiconductor substrates for photonics device integration
US10410798B2 (en) * 2014-10-17 2019-09-10 Teknologian Tutkimuskeskus Vtt Oy Blank suitable for use as a body of a supercapacitor, a supercapacitor, and a method of manufacturing a porous silicon volume
US12020940B2 (en) * 2021-07-15 2024-06-25 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor devices and methods of manufacturing thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2243523A1 (oth) * 1973-09-07 1975-04-04 Philips Nv
EP0052948A1 (en) * 1980-11-24 1982-06-02 Motorola, Inc. Oxide isolation process
WO1988010510A1 (en) * 1987-06-15 1988-12-29 Ncr Corporation Semiconductor field oxide formation process

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Publication number Priority date Publication date Assignee Title
US4563227A (en) * 1981-12-08 1986-01-07 Matsushita Electric Industrial Co., Ltd. Method for manufacturing a semiconductor device
JPS58169935A (ja) * 1982-03-30 1983-10-06 Matsushita Electronics Corp 半導体装置の製造方法
NL187373C (nl) * 1982-10-08 1991-09-02 Philips Nv Werkwijze voor vervaardiging van een halfgeleiderinrichting.
JPS59214237A (ja) * 1983-05-20 1984-12-04 Toshiba Corp 半導体装置の製造方法
US4986879A (en) * 1987-06-15 1991-01-22 Ncr Corporation Structure and process for forming semiconductor field oxide using a sealing sidewall of consumable nitride
FR2648956A1 (fr) * 1989-06-23 1990-12-28 Commissariat Energie Atomique Procede de fabrication de l'oxyde de champ d'un circuit integre sur du silicium

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2243523A1 (oth) * 1973-09-07 1975-04-04 Philips Nv
EP0052948A1 (en) * 1980-11-24 1982-06-02 Motorola, Inc. Oxide isolation process
WO1988010510A1 (en) * 1987-06-15 1988-12-29 Ncr Corporation Semiconductor field oxide formation process

Non-Patent Citations (6)

* Cited by examiner, † Cited by third party
Title
ELECTRONIC DESIGN. vol. 37, no. 24, 23 novembre 1989, HASBROUCK HEIGHTS page 29 Dave BURSKY: "CMOS process breaks "bird's beak" barrier" *
EXTENDED ABSTRACTS, SPRING MEETING MONTREAL vol. 90-1, 06 mai 1990, PRINCETON, NEW JERSE pages 616 - 617; S.S. LEE et al.: "A novel CMOS isolation technology using a consumable nitride seal during field oxidation" *
IEEE TRANSACTIONS ON ELECTRON DEVICES. vol. ED-29, no. 4, avril 1982, NEW YORK US pages 536 - 540; KUANG YI CHIU et al.: "A bird's beak free local oxidation technology feasible for VLSI circuits fabrication" *
JAPANESE JOURNAL OF APPLIED PHYSICS, SUPPLEMENTS.(18th. Int. Conf. on Solid State Dev ices and Materials, TOKYO 1986) 20 août 1986, TOKYO JA pages 295 - 298; K. TSUKAMOTO et al.: "Peripheral capacitor cell with fully recessed isolation for megabit DRAM" *
JOURNAL OF THE ELECTROCHEMICAL SOCIETY. vol. 137, no. 8, août 1990, MANCHESTER, NEW HAMP pages 2586 - 2588; V.K. DWIVEDI: "A Bird's-Beak-free sealed-interface local oxidation technology for submicron ultra large scale integrated circuits" *
XEROX DISCLOSURE JOURNAL. vol. 12, no. 5, septembre 1987, STAMFORD, CONN US pages 251 - 253; Russel MARTIN: "Spacer for improved local oxidation profile" *

Also Published As

Publication number Publication date
US5229318A (en) 1993-07-20
EP0498717A1 (fr) 1992-08-12
FR2672731B1 (oth) 1997-03-07
JPH0555367A (ja) 1993-03-05

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