FR2566149B1 - Montage programmable de registres d'etat et systeme de commande a microprocesseur pourvu d'un tel montage - Google Patents
Montage programmable de registres d'etat et systeme de commande a microprocesseur pourvu d'un tel montageInfo
- Publication number
- FR2566149B1 FR2566149B1 FR8508796A FR8508796A FR2566149B1 FR 2566149 B1 FR2566149 B1 FR 2566149B1 FR 8508796 A FR8508796 A FR 8508796A FR 8508796 A FR8508796 A FR 8508796A FR 2566149 B1 FR2566149 B1 FR 2566149B1
- Authority
- FR
- France
- Prior art keywords
- mounting
- control system
- system provided
- programmable
- microprocessor control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/22—Handling requests for interconnection or transfer for access to input/output bus using successive scanning, e.g. polling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microcomputers (AREA)
- Debugging And Monitoring (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/620,197 US4636978A (en) | 1984-06-13 | 1984-06-13 | Programmable status register arrangement |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2566149A1 FR2566149A1 (fr) | 1985-12-20 |
FR2566149B1 true FR2566149B1 (fr) | 1988-10-14 |
Family
ID=24484982
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR8508796A Expired FR2566149B1 (fr) | 1984-06-13 | 1985-06-11 | Montage programmable de registres d'etat et systeme de commande a microprocesseur pourvu d'un tel montage |
Country Status (5)
Country | Link |
---|---|
US (1) | US4636978A (fr) |
JP (1) | JPS617968A (fr) |
DE (1) | DE3520297A1 (fr) |
FR (1) | FR2566149B1 (fr) |
GB (1) | GB2160340B (fr) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
SG46471A1 (en) * | 1990-05-18 | 1998-02-20 | Ibm | Data processing system having plural adapters connecting plural peripheral devices |
GB9018990D0 (en) * | 1990-08-31 | 1990-10-17 | Ncr Co | Register control for workstation interfacing means |
US8625242B2 (en) * | 2011-08-03 | 2014-01-07 | Maxim Integrated Products, Inc. | Failsafe galvanic isolation barrier |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4034349A (en) * | 1976-01-29 | 1977-07-05 | Sperry Rand Corporation | Apparatus for processing interrupts in microprocessing systems |
JPS5833576B2 (ja) * | 1977-03-14 | 1983-07-20 | 株式会社東芝 | 計算機システムの故障診断装置 |
US4124899A (en) * | 1977-05-23 | 1978-11-07 | Monolithic Memories, Inc. | Programmable array logic circuit |
US4209839A (en) * | 1978-06-16 | 1980-06-24 | International Business Machines Corporation | Shared synchronous memory multiprocessing arrangement |
FR2473196A1 (fr) * | 1980-01-04 | 1981-07-10 | Geluwe Jan Van | Systeme centralise de lecture d'informations a partir de postes peripheriques |
DE3145632A1 (de) * | 1981-11-17 | 1983-05-26 | Siemens AG, 1000 Berlin und 8000 München | Verfahren und anordnung zur ueberwachten uebergabe von steuersignalen an schnittstellen digitaler systeme |
DE3219270A1 (de) * | 1982-05-21 | 1983-11-24 | Siemens AG, 1000 Berlin und 8000 München | Anordnung zur aufnahme von daten elektrischer schaltgeraete |
US4546444A (en) * | 1983-03-15 | 1985-10-08 | E. I. Du Pont De Nemours And Company | Data compression interface having parallel memory architecture |
-
1984
- 1984-06-13 US US06/620,197 patent/US4636978A/en not_active Expired - Fee Related
-
1985
- 1985-06-07 DE DE19853520297 patent/DE3520297A1/de not_active Ceased
- 1985-06-10 GB GB08514624A patent/GB2160340B/en not_active Expired
- 1985-06-10 JP JP60124415A patent/JPS617968A/ja active Pending
- 1985-06-11 FR FR8508796A patent/FR2566149B1/fr not_active Expired
Also Published As
Publication number | Publication date |
---|---|
US4636978A (en) | 1987-01-13 |
GB2160340B (en) | 1987-12-31 |
JPS617968A (ja) | 1986-01-14 |
GB2160340A (en) | 1985-12-18 |
GB8514624D0 (en) | 1985-07-10 |
DE3520297A1 (de) | 1985-12-19 |
FR2566149A1 (fr) | 1985-12-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
CD | Change of name or company name | ||
ST | Notification of lapse |