FR2466838A1 - Circuit d'echantillonnage et de gel a elimination de tension offset - Google Patents

Circuit d'echantillonnage et de gel a elimination de tension offset Download PDF

Info

Publication number
FR2466838A1
FR2466838A1 FR8020592A FR8020592A FR2466838A1 FR 2466838 A1 FR2466838 A1 FR 2466838A1 FR 8020592 A FR8020592 A FR 8020592A FR 8020592 A FR8020592 A FR 8020592A FR 2466838 A1 FR2466838 A1 FR 2466838A1
Authority
FR
France
Prior art keywords
transistor
conductor
capacitor
transistors
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
FR8020592A
Other languages
English (en)
French (fr)
Inventor
Yusuf A Haque
Roger A Mao
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
American Microsystems Holding Corp
Original Assignee
American Microsystems Holding Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by American Microsystems Holding Corp filed Critical American Microsystems Holding Corp
Publication of FR2466838A1 publication Critical patent/FR2466838A1/fr
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C27/00Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/02Sample-and-hold arrangements
    • G11C27/024Sample-and-hold arrangements using a capacitive memory element
    • G11C27/026Sample-and-hold arrangements using a capacitive memory element associated with an amplifier

Landscapes

  • Amplifiers (AREA)
  • Filters That Use Time-Delay Elements (AREA)
  • Measurement Of Current Or Voltage (AREA)
FR8020592A 1979-09-27 1980-09-25 Circuit d'echantillonnage et de gel a elimination de tension offset Pending FR2466838A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US7933979A 1979-09-27 1979-09-27

Publications (1)

Publication Number Publication Date
FR2466838A1 true FR2466838A1 (fr) 1981-04-10

Family

ID=22149901

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8020592A Pending FR2466838A1 (fr) 1979-09-27 1980-09-25 Circuit d'echantillonnage et de gel a elimination de tension offset

Country Status (7)

Country Link
JP (1) JPS56501223A (enExample)
DE (1) DE3049671A1 (enExample)
FR (1) FR2466838A1 (enExample)
GB (1) GB2075781A (enExample)
NL (1) NL8020352A (enExample)
SE (1) SE8103279L (enExample)
WO (1) WO1981000928A1 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0322074A3 (en) * 1987-12-23 1989-10-18 Philips Electronic And Associated Industries Limited Circuit arrangement for processing sampled analogue electrical signals
EP0551910A3 (en) * 1992-01-16 1995-08-30 Toshiba Kk Offset detecting circuit and output circuit and integrated circuit including the output circuit

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2534415A1 (fr) * 1982-10-07 1984-04-13 Cii Honeywell Bull Procede de fabrication de resistances electriques dans un materiau semi-conducteur polycristallin et dispositif a circuits integres resultant
NL8501492A (nl) * 1985-05-24 1986-12-16 Philips Nv Bemonster- en houd-schakelinrichting.
US4691125A (en) * 1986-10-03 1987-09-01 Motorola, Inc. One hundred percent duty cycle sample-and-hold circuit
US5162670A (en) * 1990-01-26 1992-11-10 Kabushiki Kaisha Toshiba Sample-and-hold circuit device
KR100557501B1 (ko) * 2003-06-30 2006-03-07 엘지.필립스 엘시디 주식회사 아날로그 버퍼 및 그 구동방법

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3441913A (en) * 1966-04-12 1969-04-29 James J Pastoriza Multiple signal sampling and storage elements sequentially discharged through an operational amplifier
FR96064E (fr) * 1968-10-31 1972-05-19 Ferrieu Gilbert Dispositif échantillonneur a mémoire de signaux analogiques.
US4066919A (en) * 1976-04-01 1978-01-03 Motorola, Inc. Sample and hold circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3441913A (en) * 1966-04-12 1969-04-29 James J Pastoriza Multiple signal sampling and storage elements sequentially discharged through an operational amplifier
FR96064E (fr) * 1968-10-31 1972-05-19 Ferrieu Gilbert Dispositif échantillonneur a mémoire de signaux analogiques.
US4066919A (en) * 1976-04-01 1978-01-03 Motorola, Inc. Sample and hold circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0322074A3 (en) * 1987-12-23 1989-10-18 Philips Electronic And Associated Industries Limited Circuit arrangement for processing sampled analogue electrical signals
EP0551910A3 (en) * 1992-01-16 1995-08-30 Toshiba Kk Offset detecting circuit and output circuit and integrated circuit including the output circuit

Also Published As

Publication number Publication date
WO1981000928A1 (en) 1981-04-02
SE8103279L (sv) 1981-05-25
GB2075781A (en) 1981-11-18
DE3049671A1 (en) 1982-02-25
NL8020352A (nl) 1981-07-01
JPS56501223A (enExample) 1981-08-27

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