FR2433203A1 - Agencement de circuit pour la production d'au moins deux signaux d'horloge differents - Google Patents

Agencement de circuit pour la production d'au moins deux signaux d'horloge differents

Info

Publication number
FR2433203A1
FR2433203A1 FR7919672A FR7919672A FR2433203A1 FR 2433203 A1 FR2433203 A1 FR 2433203A1 FR 7919672 A FR7919672 A FR 7919672A FR 7919672 A FR7919672 A FR 7919672A FR 2433203 A1 FR2433203 A1 FR 2433203A1
Authority
FR
France
Prior art keywords
generator
different clock
same family
clock
clock signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR7919672A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Standard Electric Corp
Original Assignee
International Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Standard Electric Corp filed Critical International Standard Electric Corp
Publication of FR2433203A1 publication Critical patent/FR2433203A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/15013—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
    • H03K5/1502—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs programmable
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/045—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using logic state machines, consisting only of a memory or a programmable logic device containing the logic for the controlled machine and in which the state of its outputs is dependent on the state of its inputs or part of its own output states, e.g. binary decision controllers, finite state controllers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/15013—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
    • H03K5/1506—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with parallel driven output stages; with synchronously driven series connected output stages
    • H03K5/15093—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with parallel driven output stages; with synchronously driven series connected output stages using devices arranged in a shift register

Abstract

Agencement de circuit pour la production d'au moins deux signaux d'horloge différents. La présente invention a pour objet de prévoir un agencement de circuit qui permette de dériver des formes d'ondes d'horloge ou facteurs d'utilisation de signaux d'horloge d'un signal d'horloge de base donné, à l'aide de circuits intégrés disponibles dans l'industrie, les signaux d'horloge étant le plus possible synchronisés par bord, et les facteurs d'utilisation variant d'une manière simple. Application aux ordinateurs et aux générateurs d'impulsions.
FR7919672A 1978-08-09 1979-07-31 Agencement de circuit pour la production d'au moins deux signaux d'horloge differents Withdrawn FR2433203A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2834799 1978-08-09

Publications (1)

Publication Number Publication Date
FR2433203A1 true FR2433203A1 (fr) 1980-03-07

Family

ID=6046538

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7919672A Withdrawn FR2433203A1 (fr) 1978-08-09 1979-07-31 Agencement de circuit pour la production d'au moins deux signaux d'horloge differents

Country Status (1)

Country Link
FR (1) FR2433203A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0629933A1 (fr) * 1993-06-15 1994-12-21 International Business Machines Corporation Automate fini auto-séquentiel

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0629933A1 (fr) * 1993-06-15 1994-12-21 International Business Machines Corporation Automate fini auto-séquentiel
US5577238A (en) * 1993-06-15 1996-11-19 International Business Machines Corporation Multistage timing circuit having multiple counters in each timer for generating programmable duration output signals without any delay

Similar Documents

Publication Publication Date Title
JPS57168518A (en) Clock signal generating circuit
FR2282752A1 (fr) Diviseur de frequence pour montre electronique
FR2433203A1 (fr) Agencement de circuit pour la production d'au moins deux signaux d'horloge differents
JPS555544A (en) Timing pulse generation circuit
GB1425517A (en) Timing mode selector
JPS53139456A (en) Clock driver circuit
JPS5647826A (en) Waveform generator
SU902249A1 (ru) Преобразователь интервала времени в цифровой код
CH625671B (fr) Convertisseur electronique de frequence et piece d'horlogerie equipee de ce convertisseur.
GB1464842A (en) Resettable toggle flip-flop
JPS52153658A (en) Counter circuit
ATE11462T1 (de) Schaltungsanordnung zur ausfuehrung von mikrobefehlen mit unterschiedlich langen ausfuehrungszeiten.
DUNCAN Delay free realization of asynchronous sequential switching circuits(Synthesis of delay-free asynchronous sequential switching circuits)[M. S. Thesis]
SU612414A1 (ru) Делитель частоты
JPS6432722A (en) Parallel/serial converting circuit
JPS5715536A (en) Rectangular wave output circuit
SU725209A1 (ru) Формирователь импульсов
SU632072A1 (ru) Генератор одиночных импульсов
JPS57135526A (en) Frequency dividing circuit
JPS5680720A (en) Synchronous processing unit with partial processing circuit
JPS55676A (en) Pulse delay circuit
JPS56120223A (en) Timing forming circuit
JPS52124835A (en) Level conversion circuit
JPS55127755A (en) Digital tone signal detector
JPS5486248A (en) Arithmetic circuit

Legal Events

Date Code Title Description
ST Notification of lapse