FR2407505A1 - MOUNTING TO REDUCE THE SYNCHRONIZATION TIME IN PHASE OF A PHASE REGULATION CIRCUIT ON THE PHASE POSITION OF INPUT SIGNALS - Google Patents

MOUNTING TO REDUCE THE SYNCHRONIZATION TIME IN PHASE OF A PHASE REGULATION CIRCUIT ON THE PHASE POSITION OF INPUT SIGNALS

Info

Publication number
FR2407505A1
FR2407505A1 FR7829766A FR7829766A FR2407505A1 FR 2407505 A1 FR2407505 A1 FR 2407505A1 FR 7829766 A FR7829766 A FR 7829766A FR 7829766 A FR7829766 A FR 7829766A FR 2407505 A1 FR2407505 A1 FR 2407505A1
Authority
FR
France
Prior art keywords
phase
input signals
signals
locked loop
comparison
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7829766A
Other languages
French (fr)
Other versions
FR2407505B1 (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of FR2407505A1 publication Critical patent/FR2407505A1/en
Application granted granted Critical
Publication of FR2407505B1 publication Critical patent/FR2407505B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/199—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division with reset of the frequency divider or the counter, e.g. for assuring initial synchronisation

Abstract

In disk storage units, a servo control circuit is required for controlling the movement of the magnetic heads to a particular position on the disk. This circuit contains a phase-locked loop (PH) which is supplied with input signals (EP) and which generates output signals (H) in dependence on the input signals. These output signals are converted into comparison signals (G) which are supplied to a phase detector (PT) contained in the phase-locked loop. The phase detector compares the comparison signals with the input signals with respect to the phase angle. To shorten the phase-locking time of the phase-locked loop (PH) in the case of abrupt changes in the phase angle of the input signals (EP), a circuit (SK1) is provided which, with the occurrence of the abrupt change in the phase angle shifts the edge of the comparison signal (G) in such a manner that the phase error between input signal (EP) and comparison signal (G) is reduced.
FR7829766A 1977-10-26 1978-10-19 MOUNTING TO REDUCE THE SYNCHRONIZATION TIME IN PHASE OF A PHASE REGULATION CIRCUIT ON THE PHASE POSITION OF INPUT SIGNALS Granted FR2407505A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2748075A DE2748075C3 (en) 1977-10-26 1977-10-26 Phase locked loop

Publications (2)

Publication Number Publication Date
FR2407505A1 true FR2407505A1 (en) 1979-05-25
FR2407505B1 FR2407505B1 (en) 1980-10-03

Family

ID=6022338

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7829766A Granted FR2407505A1 (en) 1977-10-26 1978-10-19 MOUNTING TO REDUCE THE SYNCHRONIZATION TIME IN PHASE OF A PHASE REGULATION CIRCUIT ON THE PHASE POSITION OF INPUT SIGNALS

Country Status (7)

Country Link
AT (1) AT371962B (en)
BE (1) BE871568A (en)
CH (1) CH634448A5 (en)
DE (1) DE2748075C3 (en)
FR (1) FR2407505A1 (en)
IT (1) IT1100135B (en)
NL (1) NL7806845A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0015014A1 (en) * 1979-02-05 1980-09-03 Telecommunications Radioelectriques Et Telephoniques T.R.T. Device for the rapid synchronisation of a clock

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE953880C (en) * 1941-04-22 1956-12-06 Roto Werke Ag Rotary duplicator for full-page, line or section-wise duplication
JPS55102553A (en) 1979-01-30 1980-08-05 Sumitomo Chem Co Ltd Substituted phenylurea derivative, its preparation, herbicide and fungicide comprising it as active constituent
DE3537477A1 (en) * 1985-10-22 1987-04-23 Porsche Ag ARRANGEMENT FOR INDIVIDUALLY ADAPTING A SERIAL INTERFACE OF A DATA PROCESSING SYSTEM TO A DATA TRANSMISSION SPEED OF A COMMUNICATION PARTNER
AU655482B2 (en) * 1991-07-29 1994-12-22 Smith & Nephew Richards Inc. Forceps
DE19840976C1 (en) * 1998-09-08 2000-05-18 Siemens Ag Clock-signal generation procedure especially for digital telecommunications network facility

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1142695A (en) * 1965-12-08 1969-02-12 Thomson Houston Comp Francaise Automatic phase control system
FR2291638A1 (en) * 1974-11-14 1976-06-11 Hewlett Packard Co TRIGGERABLE OSCILLATOR WITH PHASE-SLOWING MOUTH
US4017806A (en) * 1976-01-26 1977-04-12 Sperry Rand Corporation Phase locked oscillator
US4017803A (en) * 1976-01-29 1977-04-12 Sperry Rand Corporation Data recovery system resistant to frequency deviations
FR2338604A1 (en) * 1976-01-16 1977-08-12 Control Data Corp PHASE LOCKING CIRCUIT
DE2716813B1 (en) * 1977-04-15 1978-06-08 Siemens Ag Phase locked loop
FR2371090A1 (en) * 1976-11-15 1978-06-09 Rca Corp MASTER OSCILLATOR SYNCHRONIZATION SYSTEM

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1142695A (en) * 1965-12-08 1969-02-12 Thomson Houston Comp Francaise Automatic phase control system
FR2291638A1 (en) * 1974-11-14 1976-06-11 Hewlett Packard Co TRIGGERABLE OSCILLATOR WITH PHASE-SLOWING MOUTH
FR2338604A1 (en) * 1976-01-16 1977-08-12 Control Data Corp PHASE LOCKING CIRCUIT
US4017806A (en) * 1976-01-26 1977-04-12 Sperry Rand Corporation Phase locked oscillator
US4017803A (en) * 1976-01-29 1977-04-12 Sperry Rand Corporation Data recovery system resistant to frequency deviations
FR2371090A1 (en) * 1976-11-15 1978-06-09 Rca Corp MASTER OSCILLATOR SYNCHRONIZATION SYSTEM
DE2716813B1 (en) * 1977-04-15 1978-06-08 Siemens Ag Phase locked loop
FR2387551A1 (en) * 1977-04-15 1978-11-10 Siemens Ag PHASE ADJUSTMENT CIRCUIT

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0015014A1 (en) * 1979-02-05 1980-09-03 Telecommunications Radioelectriques Et Telephoniques T.R.T. Device for the rapid synchronisation of a clock

Also Published As

Publication number Publication date
IT1100135B (en) 1985-09-28
DE2748075A1 (en) 1979-05-03
ATA757678A (en) 1982-12-15
CH634448A5 (en) 1983-01-31
AT371962B (en) 1983-08-25
IT7829073A0 (en) 1978-10-25
NL7806845A (en) 1979-05-01
BE871568A (en) 1979-04-26
DE2748075C3 (en) 1980-08-07
DE2748075B2 (en) 1979-12-06
FR2407505B1 (en) 1980-10-03

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Legal Events

Date Code Title Description
ST Notification of lapse