BE871568A - MOUNTING TO REDUCE THE SYNCHRONIZATION TIME IN PHASE OF A PHASE REGULATION CIRCUIT - Google Patents

MOUNTING TO REDUCE THE SYNCHRONIZATION TIME IN PHASE OF A PHASE REGULATION CIRCUIT

Info

Publication number
BE871568A
BE871568A BE191370A BE191370A BE871568A BE 871568 A BE871568 A BE 871568A BE 191370 A BE191370 A BE 191370A BE 191370 A BE191370 A BE 191370A BE 871568 A BE871568 A BE 871568A
Authority
BE
Belgium
Prior art keywords
phase
mounting
reduce
regulation circuit
synchronization time
Prior art date
Application number
BE191370A
Other languages
French (fr)
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of BE871568A publication Critical patent/BE871568A/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/199—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division with reset of the frequency divider or the counter, e.g. for assuring initial synchronisation
BE191370A 1977-10-26 1978-10-26 MOUNTING TO REDUCE THE SYNCHRONIZATION TIME IN PHASE OF A PHASE REGULATION CIRCUIT BE871568A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2748075A DE2748075C3 (en) 1977-10-26 1977-10-26 Phase locked loop

Publications (1)

Publication Number Publication Date
BE871568A true BE871568A (en) 1979-04-26

Family

ID=6022338

Family Applications (1)

Application Number Title Priority Date Filing Date
BE191370A BE871568A (en) 1977-10-26 1978-10-26 MOUNTING TO REDUCE THE SYNCHRONIZATION TIME IN PHASE OF A PHASE REGULATION CIRCUIT

Country Status (7)

Country Link
AT (1) AT371962B (en)
BE (1) BE871568A (en)
CH (1) CH634448A5 (en)
DE (1) DE2748075C3 (en)
FR (1) FR2407505A1 (en)
IT (1) IT1100135B (en)
NL (1) NL7806845A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4378992A (en) 1979-01-30 1983-04-05 Sumitomo Chemical Company, Limited Urea derivatives, and their production and use

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE953880C (en) * 1941-04-22 1956-12-06 Roto Werke Ag Rotary duplicator for full-page, line or section-wise duplication
FR2448257A1 (en) * 1979-02-05 1980-08-29 Trt Telecom Radio Electr DEVICE FOR FAST RESYNCHRONIZATION OF A CLOCK
DE3537477A1 (en) * 1985-10-22 1987-04-23 Porsche Ag ARRANGEMENT FOR INDIVIDUALLY ADAPTING A SERIAL INTERFACE OF A DATA PROCESSING SYSTEM TO A DATA TRANSMISSION SPEED OF A COMMUNICATION PARTNER
AU655482B2 (en) * 1991-07-29 1994-12-22 Smith & Nephew Richards Inc. Forceps
DE19840976C1 (en) * 1998-09-08 2000-05-18 Siemens Ag Clock-signal generation procedure especially for digital telecommunications network facility

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1469000A (en) * 1965-12-08 1967-02-10 Thomson Houston Comp Francaise Improvements to processes and synchronization devices
US3921095A (en) * 1974-11-14 1975-11-18 Hewlett Packard Co Startable phase-locked loop oscillator
US4005479A (en) * 1976-01-16 1977-01-25 Control Data Corporation Phase locked circuits
US4017806A (en) * 1976-01-26 1977-04-12 Sperry Rand Corporation Phase locked oscillator
US4017803A (en) * 1976-01-29 1977-04-12 Sperry Rand Corporation Data recovery system resistant to frequency deviations
US4092672A (en) * 1976-11-15 1978-05-30 Rca Corporation Master oscillator synchronizing system
DE2716813C2 (en) * 1977-04-15 1979-01-25 Siemens Ag, 1000 Berlin Und 8000 Muenchen Phase locked loop

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4378992A (en) 1979-01-30 1983-04-05 Sumitomo Chemical Company, Limited Urea derivatives, and their production and use

Also Published As

Publication number Publication date
IT1100135B (en) 1985-09-28
DE2748075A1 (en) 1979-05-03
ATA757678A (en) 1982-12-15
DE2748075B2 (en) 1979-12-06
FR2407505A1 (en) 1979-05-25
IT7829073A0 (en) 1978-10-25
FR2407505B1 (en) 1980-10-03
AT371962B (en) 1983-08-25
CH634448A5 (en) 1983-01-31
DE2748075C3 (en) 1980-08-07
NL7806845A (en) 1979-05-01

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Legal Events

Date Code Title Description
RE Patent lapsed

Owner name: SIEMENS A.G.

Effective date: 19851031