FR2404893A1 - Cellule de memoire remanente a percage - Google Patents

Cellule de memoire remanente a percage

Info

Publication number
FR2404893A1
FR2404893A1 FR7827688A FR7827688A FR2404893A1 FR 2404893 A1 FR2404893 A1 FR 2404893A1 FR 7827688 A FR7827688 A FR 7827688A FR 7827688 A FR7827688 A FR 7827688A FR 2404893 A1 FR2404893 A1 FR 2404893A1
Authority
FR
France
Prior art keywords
memory cell
drilling
substrate
type
buried layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR7827688A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
USA
Original Assignee
USA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by USA filed Critical USA
Publication of FR2404893A1 publication Critical patent/FR2404893A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

La présente invention concerne une cellule de mémoire rémanente à perçage. Cette cellule de mémoire comprend un substrat 1 de type p, des zones de diffusion de type n**+ 4 et 5 séparées, et, sur la surface 3 du substrat, des couches successives de SiO2 6, Si3 N 4 7 et de porte 8. Une couche enterrée 2 de type n**+ est comprise dans le substrat en regard de la couche de porte. Ainsi, des électrons peuvent être injectés à l'interface des couches 6 et 7 à partir de la couche enterrée. Application à la fabrication de réseaux de mémoire de faible coût.
FR7827688A 1977-09-30 1978-09-27 Cellule de memoire remanente a percage Withdrawn FR2404893A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/838,437 US4163985A (en) 1977-09-30 1977-09-30 Nonvolatile punch through memory cell with buried n+ region in channel

Publications (1)

Publication Number Publication Date
FR2404893A1 true FR2404893A1 (fr) 1979-04-27

Family

ID=25277084

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7827688A Withdrawn FR2404893A1 (fr) 1977-09-30 1978-09-27 Cellule de memoire remanente a percage

Country Status (5)

Country Link
US (1) US4163985A (fr)
DE (1) DE2842122A1 (fr)
FR (1) FR2404893A1 (fr)
GB (1) GB2005914B (fr)
NL (1) NL7809899A (fr)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4471368A (en) * 1977-10-13 1984-09-11 Mohsen Amr M Dynamic RAM memory and vertical charge coupled dynamic storage cell therefor
NL7801532A (nl) * 1978-02-10 1979-08-14 Philips Nv Halfgeleiderinrichting.
JPS54149469A (en) * 1978-05-16 1979-11-22 Toshiba Corp Semiconductor device
US4305083A (en) * 1978-09-19 1981-12-08 Texas Instruments Incorporated Single junction charge injector floating gate memory cell
JPS607389B2 (ja) * 1978-12-26 1985-02-23 超エル・エス・アイ技術研究組合 半導体装置の製造方法
JPS5656677A (en) * 1979-10-13 1981-05-18 Toshiba Corp Semiconductor memory device
US4335450A (en) * 1980-01-30 1982-06-15 International Business Machines Corporation Non-destructive read out field effect transistor memory cell system
JPS5955071A (ja) * 1982-09-24 1984-03-29 Hitachi Micro Comput Eng Ltd 不揮発性半導体装置
JPS59161873A (ja) * 1983-03-07 1984-09-12 Agency Of Ind Science & Technol 半導体不揮発性メモリ
GB8907262D0 (en) * 1989-03-31 1989-05-17 Philips Nv Electrically-programmable semiconductor memories
US5216269A (en) * 1989-03-31 1993-06-01 U.S. Philips Corp. Electrically-programmable semiconductor memories with buried injector region
DE69019872T2 (de) * 1989-03-31 1996-02-22 Philips Electronics Nv Elektrisch programmierbare Halbleiterspeicher.
US5850093A (en) * 1989-11-20 1998-12-15 Tarng; Huang Chang Uni-directional flash device
US5264384A (en) * 1991-08-30 1993-11-23 Texas Instruments Incorporated Method of making a non-volatile memory cell
US6128211A (en) * 1997-11-06 2000-10-03 National Science Council Structures of a low-voltage-operative non-volatile ferroelectric memory device with floating gate
US6117739A (en) * 1998-10-02 2000-09-12 Advanced Micro Devices, Inc. Semiconductor device with layered doped regions and methods of manufacture
US6677640B1 (en) * 2000-03-01 2004-01-13 Micron Technology, Inc. Memory cell with tight coupling
KR100375232B1 (ko) * 2001-03-20 2003-03-08 삼성전자주식회사 비휘발성 메모리 소자의 제조방법
US6980471B1 (en) 2004-12-23 2005-12-27 Sandisk Corporation Substrate electron injection techniques for programming non-volatile charge storage memory cells

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2152803A1 (fr) * 1971-09-08 1973-04-27 Sony Corp
US3774087A (en) * 1972-12-05 1973-11-20 Plessey Handel Investment Ag Memory elements
US3996657A (en) * 1974-12-30 1976-12-14 Intel Corporation Double polycrystalline silicon gate memory device
US4035820A (en) * 1975-12-29 1977-07-12 Texas Instruments Incorporated Adjustment of avalanche voltage in DIFMOS memory devices by control of impurity doping

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3887407A (en) * 1967-02-03 1975-06-03 Hitachi Ltd Method of manufacturing semiconductor device with nitride oxide double layer film
US3877054A (en) * 1973-03-01 1975-04-08 Bell Telephone Labor Inc Semiconductor memory apparatus with a multilayer insulator contacting the semiconductor
JPS5636585B2 (fr) * 1973-07-02 1981-08-25
JPS5024084A (fr) * 1973-07-05 1975-03-14
US3923559A (en) * 1975-01-13 1975-12-02 Bell Telephone Labor Inc Use of trapped hydrogen for annealing metal-oxide-semiconductor devices
JPS51122383A (en) * 1975-04-18 1976-10-26 Fujitsu Ltd Semiconductor memory
US4000504A (en) * 1975-05-12 1976-12-28 Hewlett-Packard Company Deep channel MOS transistor
US4010482A (en) * 1975-12-31 1977-03-01 International Business Machines Corporation Non-volatile schottky barrier diode memory cell

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2152803A1 (fr) * 1971-09-08 1973-04-27 Sony Corp
US3774087A (en) * 1972-12-05 1973-11-20 Plessey Handel Investment Ag Memory elements
US3996657A (en) * 1974-12-30 1976-12-14 Intel Corporation Double polycrystalline silicon gate memory device
US4035820A (en) * 1975-12-29 1977-07-12 Texas Instruments Incorporated Adjustment of avalanche voltage in DIFMOS memory devices by control of impurity doping

Also Published As

Publication number Publication date
US4163985A (en) 1979-08-07
DE2842122A1 (de) 1979-04-12
GB2005914A (en) 1979-04-25
GB2005914B (en) 1982-05-19
NL7809899A (nl) 1979-04-03

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Legal Events

Date Code Title Description
ST Notification of lapse