FR2388457A1 - Carte de circuit imprime a couches multiples - Google Patents

Carte de circuit imprime a couches multiples

Info

Publication number
FR2388457A1
FR2388457A1 FR7811357A FR7811357A FR2388457A1 FR 2388457 A1 FR2388457 A1 FR 2388457A1 FR 7811357 A FR7811357 A FR 7811357A FR 7811357 A FR7811357 A FR 7811357A FR 2388457 A1 FR2388457 A1 FR 2388457A1
Authority
FR
France
Prior art keywords
printed circuit
circuit board
layer printed
circuits
intended
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7811357A
Other languages
English (en)
Other versions
FR2388457B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of FR2388457A1 publication Critical patent/FR2388457A1/fr
Application granted granted Critical
Publication of FR2388457B1 publication Critical patent/FR2388457B1/fr
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0286Programmable, customizable or modifiable circuits
    • H05K1/0292Programmable, customizable or modifiable circuits having a modifiable lay-out, i.e. adapted for engineering changes or repair
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0286Programmable, customizable or modifiable circuits
    • H05K1/0287Programmable, customizable or modifiable circuits having an universal lay-out, e.g. pad or land grid patterns or mesh patterns
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0296Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298Multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09536Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10689Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

L'invention concerne une carte de circuit imprimé à couches multiples. Elle comporte des première et seconde cartes de circuit imprimé séparées par une couche isolante. Des surfaces de modification sont associées avec les surfaces de contact destinées à recevoir des composants et sont reliées à des couches intérieures par des trous métallisés. Cette disposition a pour but de faciliter les modifications de circuits après leur réalisation. L'invention s'applique notamment à des cartes destinées à recevoir des circuits d'intégration poussée.
FR7811357A 1977-04-19 1978-04-18 Carte de circuit imprime a couches multiples Granted FR2388457A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4469477A JPS53129863A (en) 1977-04-19 1977-04-19 Multilayer printed board

Publications (2)

Publication Number Publication Date
FR2388457A1 true FR2388457A1 (fr) 1978-11-17
FR2388457B1 FR2388457B1 (fr) 1981-08-28

Family

ID=12698514

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7811357A Granted FR2388457A1 (fr) 1977-04-19 1978-04-18 Carte de circuit imprime a couches multiples

Country Status (5)

Country Link
US (1) US4150421A (fr)
JP (1) JPS53129863A (fr)
DE (1) DE2816857A1 (fr)
FR (1) FR2388457A1 (fr)
GB (1) GB1571367A (fr)

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5586200A (en) * 1978-12-25 1980-06-28 Fujitsu Ltd Back panel for mounting printed board
US4245273A (en) * 1979-06-29 1981-01-13 International Business Machines Corporation Package for mounting and interconnecting a plurality of large scale integrated semiconductor devices
DE3020196C2 (de) * 1980-05-28 1982-05-06 Ruwel-Werke Spezialfabrik für Leiterplatten GmbH, 4170 Geldern Mehrebenen-Leiterplatte und Verfahren zu deren Herstellung
JPS57205179U (fr) * 1981-06-24 1982-12-27
JPS582054A (ja) * 1981-06-26 1983-01-07 Fujitsu Ltd 半導体装置
FR2512315A1 (fr) * 1981-09-02 1983-03-04 Rouge Francois Ebauche de circuit electrique multicouche et procede de fabrication de circuits multicouches en comportant application
US4489364A (en) * 1981-12-31 1984-12-18 International Business Machines Corporation Chip carrier with embedded engineering change lines with severable periodically spaced bridging connectors on the chip supporting surface
FR2555011B1 (fr) * 1983-11-15 1986-01-24 Thomson Csf Carte imprimee a empreintes
US4628411A (en) * 1984-03-12 1986-12-09 International Business Machines Corporation Apparatus for directly powering a multi-chip module from a power distribution bus
US4598166A (en) * 1984-08-06 1986-07-01 Gte Communication Systems Corporation High density multi-layer circuit arrangement
JPS61131498A (ja) * 1984-11-29 1986-06-19 富士通株式会社 終端回路配線構造
US4729061A (en) * 1985-04-29 1988-03-01 Advanced Micro Devices, Inc. Chip on board package for integrated circuit devices using printed circuit boards and means for conveying the heat to the opposite side of the package from the chip mounting side to permit the heat to dissipate therefrom
JPS6288346A (ja) * 1985-10-15 1987-04-22 Hitachi Ltd 多層配線基板
DE3605474A1 (de) * 1986-02-20 1987-08-27 Siemens Ag Mehrlagen-leiterplatte
US4688151A (en) * 1986-03-10 1987-08-18 International Business Machines Corporation Multilayered interposer board for powering high current chip modules
US4900878A (en) * 1988-10-03 1990-02-13 Hughes Aircraft Company Circuit terminations having improved electrical and structural integrity
US5001605A (en) * 1988-11-30 1991-03-19 Hughes Aircraft Company Multilayer printed wiring board with single layer vias
US5220490A (en) * 1990-10-25 1993-06-15 Microelectronics And Computer Technology Corporation Substrate interconnect allowing personalization using spot surface links
US5264664A (en) * 1992-04-20 1993-11-23 International Business Machines Corporation Programmable chip to circuit board connection
JP2819523B2 (ja) * 1992-10-09 1998-10-30 インターナショナル・ビジネス・マシーンズ・コーポレイション 印刷配線板及びその製造方法
US5418689A (en) * 1993-02-01 1995-05-23 International Business Machines Corporation Printed circuit board or card for direct chip attachment and fabrication thereof
US5450290A (en) * 1993-02-01 1995-09-12 International Business Machines Corporation Printed circuit board with aligned connections and method of making same
JP3037043B2 (ja) * 1993-10-29 2000-04-24 日本電気株式会社 プリント基板のテスト容易化回路実装方式
KR0157906B1 (ko) * 1995-10-19 1998-12-01 문정환 더미볼을 이용한 비지에이 패키지 및 그 보수방법
US6010058A (en) * 1995-10-19 2000-01-04 Lg Semicon Co., Ltd. BGA package using a dummy ball and a repairing method thereof
US6201194B1 (en) * 1998-12-02 2001-03-13 International Business Machines Corporation Multi-voltage plane, multi-signal plane circuit card with photoimageable dielectric
US6535396B1 (en) * 2000-04-28 2003-03-18 Delphi Technologies, Inc. Combination circuit board and segmented conductive bus substrate
US7738249B2 (en) * 2007-10-25 2010-06-15 Endicott Interconnect Technologies, Inc. Circuitized substrate with internal cooling structure and electrical assembly utilizing same
US8851356B1 (en) 2008-02-14 2014-10-07 Metrospec Technology, L.L.C. Flexible circuit board interconnection and methods
US8007286B1 (en) * 2008-03-18 2011-08-30 Metrospec Technology, Llc Circuit boards interconnected by overlapping plated through holes portions
US10334735B2 (en) 2008-02-14 2019-06-25 Metrospec Technology, L.L.C. LED lighting systems and methods
US11266014B2 (en) 2008-02-14 2022-03-01 Metrospec Technology, L.L.C. LED lighting systems and method
US10849200B2 (en) 2018-09-28 2020-11-24 Metrospec Technology, L.L.C. Solid state lighting circuit with current bias and method of controlling thereof
US11282767B2 (en) * 2019-02-15 2022-03-22 Advanced Semicondutor Engineering, Inc. Semiconductor package structure and electronic device
US11454661B2 (en) 2020-11-05 2022-09-27 Amplifier Research Corp. Field probe

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2241946A1 (fr) * 1973-08-24 1975-03-21 Honeywell Bull Soc Ind

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3571923A (en) * 1968-12-30 1971-03-23 North American Rockwell Method of making redundant circuit board interconnections
GB1356632A (en) * 1971-07-09 1974-06-12 Plessey Co Ltd Multiplayer printed-circuit boards
US3968193A (en) * 1971-08-27 1976-07-06 International Business Machines Corporation Firing process for forming a multilayer glass-metal module

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2241946A1 (fr) * 1973-08-24 1975-03-21 Honeywell Bull Soc Ind

Also Published As

Publication number Publication date
GB1571367A (en) 1980-07-16
JPS5636596B2 (fr) 1981-08-25
JPS53129863A (en) 1978-11-13
DE2816857A1 (de) 1978-10-26
FR2388457B1 (fr) 1981-08-28
US4150421A (en) 1979-04-17

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Legal Events

Date Code Title Description
ST Notification of lapse