FR2366623A1 - Dispositif d'initialisation de registre d'adresse de memoire inalterable destinee a memoriser plusieurs microprogrammes - Google Patents

Dispositif d'initialisation de registre d'adresse de memoire inalterable destinee a memoriser plusieurs microprogrammes

Info

Publication number
FR2366623A1
FR2366623A1 FR7729722A FR7729722A FR2366623A1 FR 2366623 A1 FR2366623 A1 FR 2366623A1 FR 7729722 A FR7729722 A FR 7729722A FR 7729722 A FR7729722 A FR 7729722A FR 2366623 A1 FR2366623 A1 FR 2366623A1
Authority
FR
France
Prior art keywords
address register
register
inalterable
memory address
initialization device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7729722A
Other languages
English (en)
Other versions
FR2366623B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Original Assignee
Honeywell Information Systems Italia SpA
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Italia SpA, Honeywell Information Systems Inc filed Critical Honeywell Information Systems Italia SpA
Publication of FR2366623A1 publication Critical patent/FR2366623A1/fr
Application granted granted Critical
Publication of FR2366623B1 publication Critical patent/FR2366623B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/262—Arrangements for next microinstruction selection
    • G06F9/268—Microinstruction selection not based on processing results, e.g. interrupt, patch, first cycle store, diagnostic programs

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Read Only Memory (AREA)

Abstract

L'invention concerne un dispositif d'initialisation de registre d'adresse de mémoire inaltérable destinée à mémoriser plusieurs microprogrammes. Ce dispositif comprend a un premier moyen, relié à un registre RSLR 7 et à un registre d'adresse ROM 5 et réagissant à une position prédéterminée de bit du registre RSLR 7 pour mettre à << zéro >> les deux premiers bits mémorisés dans les positions n degrés 0 et l'un desdits registres d'adresse ROM 5, et b un second moyen, relié au registre RSLR 7 et au registre d'adresse ROM 5 et réagissant à la position prédéterminée de bit du registre RSLR 7 pour mettre à << zéro >> tous les bits mémorisés dans toutes les positions après la position n degrés 1 dans ledit registre d'adresse ROM 5. Application aux dispositifs de commande par microprogramme.
FR7729722A 1976-10-04 1977-10-03 Dispositif d'initialisation de registre d'adresse de memoire inalterable destinee a memoriser plusieurs microprogrammes Granted FR2366623A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/729,065 US4107774A (en) 1976-10-04 1976-10-04 Microprogram splatter return apparatus

Publications (2)

Publication Number Publication Date
FR2366623A1 true FR2366623A1 (fr) 1978-04-28
FR2366623B1 FR2366623B1 (fr) 1984-10-26

Family

ID=24929437

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7729722A Granted FR2366623A1 (fr) 1976-10-04 1977-10-03 Dispositif d'initialisation de registre d'adresse de memoire inalterable destinee a memoriser plusieurs microprogrammes

Country Status (7)

Country Link
US (1) US4107774A (fr)
JP (1) JPS5383442A (fr)
AU (1) AU509114B2 (fr)
CA (1) CA1099028A (fr)
DE (1) DE2744252A1 (fr)
FR (1) FR2366623A1 (fr)
GB (1) GB1594837A (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0045634A1 (fr) * 1980-07-31 1982-02-10 Sperry Corporation Appareil de traitement de données digitales arrangé pour l'exécution d'instructions simultanées

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4240139A (en) * 1977-09-22 1980-12-16 Tokyo Shibaura Denki Kabushiki Kaisha Address generating system
US4309753A (en) * 1979-01-03 1982-01-05 Honeywell Information System Inc. Apparatus and method for next address generation in a data processing system
DE2929579C2 (de) * 1979-07-21 1984-05-17 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Wasserzulaufvorrichtung für Geschirrspülmaschinen
US5572692A (en) * 1991-12-24 1996-11-05 Intel Corporation Memory configuration decoding system having automatic row base address generation mechanism for variable memory devices with row access interleaving
US6789186B1 (en) * 2000-02-18 2004-09-07 Hewlett-Packard Development Company, L.P. Method and apparatus to reduce penalty of microcode lookup

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2195372A5 (fr) * 1972-06-02 1974-03-01 Ibm

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3445818A (en) * 1966-08-01 1969-05-20 Rca Corp Memory accessing system
US3736567A (en) * 1971-09-08 1973-05-29 Bunker Ramo Program sequence control
GB1443064A (en) * 1973-07-18 1976-07-21 Int Computers Ltd Microprogramme unit for a data processor
DE2364408C3 (de) * 1973-12-22 1979-06-07 Olympia Werke Ag, 2940 Wilhelmshaven Schaltungsanordnung zur Adressierung der Speicherplätze eines aus mehreren Chips bestehenden Speichers

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2195372A5 (fr) * 1972-06-02 1974-03-01 Ibm

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
EXBK/74 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0045634A1 (fr) * 1980-07-31 1982-02-10 Sperry Corporation Appareil de traitement de données digitales arrangé pour l'exécution d'instructions simultanées

Also Published As

Publication number Publication date
AU509114B2 (en) 1980-04-17
DE2744252A1 (de) 1978-04-06
CA1099028A (fr) 1981-04-07
GB1594837A (en) 1981-08-05
DE2744252C2 (fr) 1987-05-27
FR2366623B1 (fr) 1984-10-26
JPS5383442A (en) 1978-07-22
AU2902277A (en) 1979-03-29
US4107774A (en) 1978-08-15

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