FR2335098A1 - Digital phase locked loop for navigation systems - is designed specially for microwave systems such as TACAN and includes a/d converter and sequence register - Google Patents
Digital phase locked loop for navigation systems - is designed specially for microwave systems such as TACAN and includes a/d converter and sequence registerInfo
- Publication number
- FR2335098A1 FR2335098A1 FR7537609A FR7537609A FR2335098A1 FR 2335098 A1 FR2335098 A1 FR 2335098A1 FR 7537609 A FR7537609 A FR 7537609A FR 7537609 A FR7537609 A FR 7537609A FR 2335098 A1 FR2335098 A1 FR 2335098A1
- Authority
- FR
- France
- Prior art keywords
- pulse
- sequence register
- input signal
- locked loop
- systems
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 101100536250 Homo sapiens TMEM120A gene Proteins 0.000 title 1
- 102100028548 Ion channel TACAN Human genes 0.000 title 1
- 230000001360 synchronised effect Effects 0.000 abstract 3
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S1/00—Beacons or beacon systems transmitting signals having a characteristic or characteristics capable of being detected by non-directional receivers and defining directions, positions, or position lines fixed relatively to the beacon transmitters; Receivers co-operating therewith
- G01S1/02—Beacons or beacon systems transmitting signals having a characteristic or characteristics capable of being detected by non-directional receivers and defining directions, positions, or position lines fixed relatively to the beacon transmitters; Receivers co-operating therewith using radio waves
- G01S1/08—Systems for determining direction or position line
- G01S1/44—Rotating or oscillating beam beacons defining directions in the plane of rotation or oscillation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Remote Sensing (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
The phase-locked loop generates clock pulses synchronised with the passage through zero of an input data signal, e.G. for use in navigation systems. An A/D convertor continuously converts the input signal into a digital signal which is checked and stored by a memory when it receives a clock pulse. When a given digital signal count is reached an instruction sequence register reads out the count in synchronism with the zero passage of the input signal and generates a carry pulse at the end of the count. The carry pulse is fed to a pulse generator to produce a synchronous output clock pulse which leads or lags the zero passage of the input signal by the counting time of the instruction sequence register. A circuit feeds the output clock pulse to the memory which ensures this pulse and a second output clock pulse are synchronized with the zero passage of the input signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR7537609A FR2335098A1 (en) | 1975-12-09 | 1975-12-09 | Digital phase locked loop for navigation systems - is designed specially for microwave systems such as TACAN and includes a/d converter and sequence register |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR7537609A FR2335098A1 (en) | 1975-12-09 | 1975-12-09 | Digital phase locked loop for navigation systems - is designed specially for microwave systems such as TACAN and includes a/d converter and sequence register |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| FR2335098A1 true FR2335098A1 (en) | 1977-07-08 |
Family
ID=9163488
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR7537609A Withdrawn FR2335098A1 (en) | 1975-12-09 | 1975-12-09 | Digital phase locked loop for navigation systems - is designed specially for microwave systems such as TACAN and includes a/d converter and sequence register |
Country Status (1)
| Country | Link |
|---|---|
| FR (1) | FR2335098A1 (en) |
-
1975
- 1975-12-09 FR FR7537609A patent/FR2335098A1/en not_active Withdrawn
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| GB1507642A (en) | Electrical digital data circuits | |
| GB1236198A (en) | A phase synchronising circuit | |
| US3789408A (en) | Synchronous system | |
| US4035663A (en) | Two phase clock synchronizing method and apparatus | |
| JPS5360150A (en) | Instantaneous leading-in system for digital phase lock loop | |
| ES410525A1 (en) | Arrangement for synchronizing two signals | |
| FR2335098A1 (en) | Digital phase locked loop for navigation systems - is designed specially for microwave systems such as TACAN and includes a/d converter and sequence register | |
| GB1245768A (en) | Phase locking | |
| FR2331204A1 (en) | Pulse frequency multiplier for controlling supply circuit - has clock signals counted between input pulses and held in buffer memory | |
| JPS5222416A (en) | Radio receiver with clock | |
| JPS5252616A (en) | Synchronous signal generating circuit in data reading device | |
| JPS6488274A (en) | Gps receiver | |
| SU459795A1 (en) | Frame sync device | |
| SU391750A1 (en) | DEVICE DISCRETE PHASE SYNCHRONIZATION | |
| GB1204365A (en) | Phase-locked loop | |
| JPS5787241A (en) | Phase synchronizing circuit for optional frequency conversion | |
| SU1166052A1 (en) | Device for synchronizing time scale | |
| SU496655A1 (en) | Synchronization device for pseudo-noise signal sequences | |
| SU1020987A1 (en) | Signal digital phase shift keying device | |
| SU569001A1 (en) | Controlled digital frequency divider for phase-wise automatic frequency adjustment system | |
| SU568186A1 (en) | Clock synchronization circuit | |
| SU1029403A1 (en) | Multichannel pulse generator | |
| SU781801A1 (en) | Time-spaced pulse shaper | |
| JPS5592042A (en) | Phase lock loop circuit | |
| SU459864A1 (en) | Device for measuring carrier phase deviations |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ST | Notification of lapse |