FR2333296A1 - Tension de polarisation de substrat engendree par oscillateur de regeneration - Google Patents

Tension de polarisation de substrat engendree par oscillateur de regeneration

Info

Publication number
FR2333296A1
FR2333296A1 FR7635527A FR7635527A FR2333296A1 FR 2333296 A1 FR2333296 A1 FR 2333296A1 FR 7635527 A FR7635527 A FR 7635527A FR 7635527 A FR7635527 A FR 7635527A FR 2333296 A1 FR2333296 A1 FR 2333296A1
Authority
FR
France
Prior art keywords
tension generated
substrate polarization
regeneration
oscillator
regeneration oscillator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7635527A
Other languages
English (en)
French (fr)
Other versions
FR2333296B1 (US06397114-20020528-M00001.png
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Original Assignee
Honeywell Information Systems Italia SpA
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Italia SpA, Honeywell Information Systems Inc filed Critical Honeywell Information Systems Italia SpA
Publication of FR2333296A1 publication Critical patent/FR2333296A1/fr
Application granted granted Critical
Publication of FR2333296B1 publication Critical patent/FR2333296B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/205—Substrate bias-voltage generators

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
FR7635527A 1975-11-28 1976-11-25 Tension de polarisation de substrat engendree par oscillateur de regeneration Granted FR2333296A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/636,276 US4030084A (en) 1975-11-28 1975-11-28 Substrate bias voltage generated from refresh oscillator

Publications (2)

Publication Number Publication Date
FR2333296A1 true FR2333296A1 (fr) 1977-06-24
FR2333296B1 FR2333296B1 (US06397114-20020528-M00001.png) 1983-02-11

Family

ID=24551206

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7635527A Granted FR2333296A1 (fr) 1975-11-28 1976-11-25 Tension de polarisation de substrat engendree par oscillateur de regeneration

Country Status (6)

Country Link
US (1) US4030084A (US06397114-20020528-M00001.png)
JP (1) JPS5267533A (US06397114-20020528-M00001.png)
BE (1) BE848031A (US06397114-20020528-M00001.png)
CA (1) CA1099816A (US06397114-20020528-M00001.png)
FR (1) FR2333296A1 (US06397114-20020528-M00001.png)
GB (1) GB1514869A (US06397114-20020528-M00001.png)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1980001021A1 (en) * 1978-10-30 1980-05-15 Fujitsu Ltd Semiconductor circuit
EP0032588A2 (en) * 1979-12-27 1981-07-29 Kabushiki Kaisha Toshiba Substrate bias generation circuit
EP0036494A2 (de) * 1980-03-11 1981-09-30 Siemens Aktiengesellschaft Integrierte MOS-Halbleiterschaltung

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4130899A (en) * 1977-11-25 1978-12-19 Ncr Corporation System for operating volatile memory in normal and standby modes
DE2853925A1 (de) * 1978-12-14 1980-07-03 Bosch Gmbh Robert Bordrechner fuer kraftfahrzeuge
JPS55162257A (en) * 1979-06-05 1980-12-17 Fujitsu Ltd Semiconductor element having substrate bias generator circuit
JPS5619676A (en) * 1979-07-26 1981-02-24 Fujitsu Ltd Semiconductor device
JPS5683057A (en) * 1979-12-11 1981-07-07 Nec Corp Integrated circuit
JPS56117390A (en) * 1980-02-16 1981-09-14 Fujitsu Ltd Semiconductor memory device
JPS59162690A (ja) * 1983-03-04 1984-09-13 Nec Corp 擬似スタテイツクメモリ
US5125077A (en) * 1983-11-02 1992-06-23 Microsoft Corporation Method of formatting data from a mouse
JPS60136157U (ja) * 1984-12-29 1985-09-10 富士通株式会社 半導体記憶装置
KR940008147B1 (ko) * 1991-11-25 1994-09-03 삼성전자 주식회사 저전력 데이타 리텐션 기능을 가지는 반도체 메모리장치
US5596534A (en) * 1995-06-27 1997-01-21 Micron Technology, Inc. Circuit including DRAM and voltage regulator, and method of increasing speed of operation of a DRAM

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3760380A (en) * 1972-06-02 1973-09-18 Motorola Inc Silicon gate complementary mos dynamic ram
US3795898A (en) * 1972-11-03 1974-03-05 Advanced Memory Syst Random access read/write semiconductor memory
US3806741A (en) * 1972-05-17 1974-04-23 Standard Microsyst Smc Self-biasing technique for mos substrate voltage
FR2235417A1 (US06397114-20020528-M00001.png) * 1973-06-29 1975-01-24 Ibm
US3870901A (en) * 1973-12-10 1975-03-11 Gen Instrument Corp Method and apparatus for maintaining the charge on a storage node of a mos circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3651494A (en) * 1970-03-27 1972-03-21 Sperry Rand Corp Ferroelectric synchronizing and integrating apparatus

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3806741A (en) * 1972-05-17 1974-04-23 Standard Microsyst Smc Self-biasing technique for mos substrate voltage
US3760380A (en) * 1972-06-02 1973-09-18 Motorola Inc Silicon gate complementary mos dynamic ram
US3795898A (en) * 1972-11-03 1974-03-05 Advanced Memory Syst Random access read/write semiconductor memory
FR2235417A1 (US06397114-20020528-M00001.png) * 1973-06-29 1975-01-24 Ibm
US3870901A (en) * 1973-12-10 1975-03-11 Gen Instrument Corp Method and apparatus for maintaining the charge on a storage node of a mos circuit

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
EXBK/69 *
EXBK/72 *
EXBK/75 *
EXBK/76 *

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1980001021A1 (en) * 1978-10-30 1980-05-15 Fujitsu Ltd Semiconductor circuit
EP0022870A1 (en) * 1978-10-30 1981-01-28 Fujitsu Limited Semiconductor circuit
EP0022870A4 (en) * 1978-10-30 1981-02-12 Fujitsu Ltd SEMICONDUCTOR CIRCUIT.
EP0032588A2 (en) * 1979-12-27 1981-07-29 Kabushiki Kaisha Toshiba Substrate bias generation circuit
EP0032588B1 (en) * 1979-12-27 1986-04-23 Kabushiki Kaisha Toshiba Substrate bias generation circuit
EP0036494A2 (de) * 1980-03-11 1981-09-30 Siemens Aktiengesellschaft Integrierte MOS-Halbleiterschaltung
EP0036494A3 (en) * 1980-03-11 1981-11-25 Siemens Aktiengesellschaft Berlin Und Munchen Monolitic integrated digital semiconductor circuit

Also Published As

Publication number Publication date
FR2333296B1 (US06397114-20020528-M00001.png) 1983-02-11
JPS5267533A (en) 1977-06-04
BE848031A (US06397114-20020528-M00001.png) 1977-03-01
CA1099816A (en) 1981-04-21
GB1514869A (en) 1978-06-21
US4030084A (en) 1977-06-14

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Legal Events

Date Code Title Description
ST Notification of lapse