FR2330113A1 - Circuit de memoire - Google Patents
Circuit de memoireInfo
- Publication number
- FR2330113A1 FR2330113A1 FR7632647A FR7632647A FR2330113A1 FR 2330113 A1 FR2330113 A1 FR 2330113A1 FR 7632647 A FR7632647 A FR 7632647A FR 7632647 A FR7632647 A FR 7632647A FR 2330113 A1 FR2330113 A1 FR 2330113A1
- Authority
- FR
- France
- Prior art keywords
- cell
- memory cell
- blank
- igfets
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4099—Dummy cell treatment; Reference voltage generators
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Memories (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US62659775A | 1975-10-28 | 1975-10-28 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2330113A1 true FR2330113A1 (fr) | 1977-05-27 |
| FR2330113B3 FR2330113B3 (enExample) | 1979-07-13 |
Family
ID=24511071
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR7632647A Granted FR2330113A1 (fr) | 1975-10-28 | 1976-10-28 | Circuit de memoire |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JPS5255341A (enExample) |
| DE (1) | DE2646245A1 (enExample) |
| FR (1) | FR2330113A1 (enExample) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5780828A (en) * | 1980-11-07 | 1982-05-20 | Hitachi Ltd | Semiconductor integrated circuit device |
| JPS57186354A (en) * | 1981-05-13 | 1982-11-16 | Hitachi Ltd | Semiconductor memory storage and manufacture thereof |
| US4420822A (en) | 1982-03-19 | 1983-12-13 | Signetics Corporation | Field plate sensing in single transistor, single capacitor MOS random access memory |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| BE789500A (fr) * | 1971-09-30 | 1973-03-29 | Siemens Ag | Memoire a semiconducteurs avec elements de memorisation a un seul transistor |
| FR2239737B1 (enExample) * | 1973-08-02 | 1980-12-05 | Texas Instruments Inc | |
| JPS5040246A (enExample) * | 1973-08-03 | 1975-04-12 |
-
1976
- 1976-10-13 DE DE19762646245 patent/DE2646245A1/de active Pending
- 1976-10-28 JP JP51128913A patent/JPS5255341A/ja active Pending
- 1976-10-28 FR FR7632647A patent/FR2330113A1/fr active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5255341A (en) | 1977-05-06 |
| DE2646245A1 (de) | 1977-05-05 |
| FR2330113B3 (enExample) | 1979-07-13 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ST | Notification of lapse |