FR2321772A1 - Procede pour fabriquer un circuit integre comportant un transistor a effet de champ a jonction et un transistor a effet de champ mis complementaire - Google Patents

Procede pour fabriquer un circuit integre comportant un transistor a effet de champ a jonction et un transistor a effet de champ mis complementaire

Info

Publication number
FR2321772A1
FR2321772A1 FR7625373A FR7625373A FR2321772A1 FR 2321772 A1 FR2321772 A1 FR 2321772A1 FR 7625373 A FR7625373 A FR 7625373A FR 7625373 A FR7625373 A FR 7625373A FR 2321772 A1 FR2321772 A1 FR 2321772A1
Authority
FR
France
Prior art keywords
effect transistor
field
manufacturing
integrated circuit
circuit including
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7625373A
Other languages
English (en)
French (fr)
Other versions
FR2321772B1 (show.php
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens Corp
Original Assignee
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Corp filed Critical Siemens Corp
Publication of FR2321772A1 publication Critical patent/FR2321772A1/fr
Application granted granted Critical
Publication of FR2321772B1 publication Critical patent/FR2321772B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H01L21/2652—Through-implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Toxicology (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Health & Medical Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
FR7625373A 1975-08-22 1976-08-20 Procede pour fabriquer un circuit integre comportant un transistor a effet de champ a jonction et un transistor a effet de champ mis complementaire Granted FR2321772A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2537559A DE2537559C3 (de) 1975-08-22 1975-08-22 Verfahren zur Herstellung einer monolithisch integrierten Halbleiterschaltung mit einem Junction-Feldeffekttransistor und einem komplementären MIS-Feldeffekttransistor

Publications (2)

Publication Number Publication Date
FR2321772A1 true FR2321772A1 (fr) 1977-03-18
FR2321772B1 FR2321772B1 (show.php) 1980-03-28

Family

ID=5954665

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7625373A Granted FR2321772A1 (fr) 1975-08-22 1976-08-20 Procede pour fabriquer un circuit integre comportant un transistor a effet de champ a jonction et un transistor a effet de champ mis complementaire

Country Status (7)

Country Link
US (1) US4035207A (show.php)
JP (1) JPS52138885A (show.php)
DE (1) DE2537559C3 (show.php)
FR (1) FR2321772A1 (show.php)
GB (1) GB1509486A (show.php)
IT (1) IT1066949B (show.php)
NL (1) NL7609176A (show.php)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014147185A1 (fr) * 2013-03-20 2014-09-25 Mpo Energy Procede de dopage de plaques de silicium

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4217149A (en) * 1976-09-08 1980-08-12 Sanyo Electric Co., Ltd. Method of manufacturing complementary insulated gate field effect semiconductor device by multiple implantations and diffusion

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1345818A (en) * 1971-07-27 1974-02-06 Mullard Ltd Semiconductor devices
US3806371A (en) * 1971-07-28 1974-04-23 Motorola Inc Method of making complementary monolithic insulated gate field effect transistors having low threshold voltage and low leakage current
US3793088A (en) * 1972-11-15 1974-02-19 Bell Telephone Labor Inc Compatible pnp and npn devices in an integrated circuit
JPS5633864B2 (show.php) * 1972-12-06 1981-08-06
US3898105A (en) * 1973-10-25 1975-08-05 Mostek Corp Method for making FET circuits
GB1503017A (en) * 1974-02-28 1978-03-08 Tokyo Shibaura Electric Co Method of manufacturing semiconductor devices

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014147185A1 (fr) * 2013-03-20 2014-09-25 Mpo Energy Procede de dopage de plaques de silicium
FR3003687A1 (fr) * 2013-03-20 2014-09-26 Mpo Energy Procede de dopage de plaques de silicium
CN105580110A (zh) * 2013-03-20 2016-05-11 离子射线服务公司 掺杂硅片的方法

Also Published As

Publication number Publication date
DE2537559B2 (de) 1977-09-01
GB1509486A (en) 1978-05-04
JPS52138885A (en) 1977-11-19
FR2321772B1 (show.php) 1980-03-28
IT1066949B (it) 1985-03-12
NL7609176A (nl) 1977-02-24
DE2537559C3 (de) 1978-05-03
US4035207A (en) 1977-07-12
DE2537559A1 (de) 1977-02-24

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Legal Events

Date Code Title Description
ST Notification of lapse