FR2315125A1 - Procede d'adressage des micro-instructions d'une memoire morte, et circuit d'interface pour la mise en oeuvre du procede - Google Patents

Procede d'adressage des micro-instructions d'une memoire morte, et circuit d'interface pour la mise en oeuvre du procede

Info

Publication number
FR2315125A1
FR2315125A1 FR7519364A FR7519364A FR2315125A1 FR 2315125 A1 FR2315125 A1 FR 2315125A1 FR 7519364 A FR7519364 A FR 7519364A FR 7519364 A FR7519364 A FR 7519364A FR 2315125 A1 FR2315125 A1 FR 2315125A1
Authority
FR
France
Prior art keywords
memory
interface circuit
address register
microinstructions
addressed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7519364A
Other languages
English (en)
French (fr)
Other versions
FR2315125B1 (enExample
Inventor
Lucien-Jacques Foret
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Radiotechnique Compelec RTC SA
Original Assignee
Radiotechnique Compelec RTC SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Radiotechnique Compelec RTC SA filed Critical Radiotechnique Compelec RTC SA
Priority to FR7519364A priority Critical patent/FR2315125A1/fr
Publication of FR2315125A1 publication Critical patent/FR2315125A1/fr
Application granted granted Critical
Publication of FR2315125B1 publication Critical patent/FR2315125B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/262—Arrangements for next microinstruction selection
    • G06F9/264—Microinstruction selection based on results of processing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
FR7519364A 1975-06-20 1975-06-20 Procede d'adressage des micro-instructions d'une memoire morte, et circuit d'interface pour la mise en oeuvre du procede Granted FR2315125A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7519364A FR2315125A1 (fr) 1975-06-20 1975-06-20 Procede d'adressage des micro-instructions d'une memoire morte, et circuit d'interface pour la mise en oeuvre du procede

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7519364A FR2315125A1 (fr) 1975-06-20 1975-06-20 Procede d'adressage des micro-instructions d'une memoire morte, et circuit d'interface pour la mise en oeuvre du procede

Publications (2)

Publication Number Publication Date
FR2315125A1 true FR2315125A1 (fr) 1977-01-14
FR2315125B1 FR2315125B1 (enExample) 1977-12-02

Family

ID=9156808

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7519364A Granted FR2315125A1 (fr) 1975-06-20 1975-06-20 Procede d'adressage des micro-instructions d'une memoire morte, et circuit d'interface pour la mise en oeuvre du procede

Country Status (1)

Country Link
FR (1) FR2315125A1 (enExample)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3445818A (en) * 1966-08-01 1969-05-20 Rca Corp Memory accessing system
FR1577591A (enExample) * 1968-07-26 1969-08-08
US3704448A (en) * 1971-08-02 1972-11-28 Hewlett Packard Co Data processing control system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3445818A (en) * 1966-08-01 1969-05-20 Rca Corp Memory accessing system
FR1577591A (enExample) * 1968-07-26 1969-08-08
US3704448A (en) * 1971-08-02 1972-11-28 Hewlett Packard Co Data processing control system

Also Published As

Publication number Publication date
FR2315125B1 (enExample) 1977-12-02

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Legal Events

Date Code Title Description
ST Notification of lapse