FR2183709A1 - Semiconductor resistance - in epitaxial layer buried below insulating layer, for high element density - Google Patents

Semiconductor resistance - in epitaxial layer buried below insulating layer, for high element density

Info

Publication number
FR2183709A1
FR2183709A1 FR7313782A FR7313782A FR2183709A1 FR 2183709 A1 FR2183709 A1 FR 2183709A1 FR 7313782 A FR7313782 A FR 7313782A FR 7313782 A FR7313782 A FR 7313782A FR 2183709 A1 FR2183709 A1 FR 2183709A1
Authority
FR
France
Prior art keywords
epitaxial layer
element density
high element
resistance
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7313782A
Other languages
English (en)
French (fr)
Other versions
FR2183709B1 (enrdf_load_stackoverflow
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of FR2183709A1 publication Critical patent/FR2183709A1/fr
Application granted granted Critical
Publication of FR2183709B1 publication Critical patent/FR2183709B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • H01L21/743—Making of internal connections, substrate contacts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/40—Resistors
    • H10D1/43—Resistors having PN junctions

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)
FR7313782A 1972-05-11 1973-03-30 Semiconductor resistance - in epitaxial layer buried below insulating layer, for high element density Granted FR2183709A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US25244572A 1972-05-11 1972-05-11

Publications (2)

Publication Number Publication Date
FR2183709A1 true FR2183709A1 (en) 1973-12-21
FR2183709B1 FR2183709B1 (enrdf_load_stackoverflow) 1976-05-28

Family

ID=22956030

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7313782A Granted FR2183709A1 (en) 1972-05-11 1973-03-30 Semiconductor resistance - in epitaxial layer buried below insulating layer, for high element density

Country Status (5)

Country Link
JP (1) JPS5317394B2 (enrdf_load_stackoverflow)
CA (1) CA985793A (enrdf_load_stackoverflow)
DE (1) DE2314747A1 (enrdf_load_stackoverflow)
FR (1) FR2183709A1 (enrdf_load_stackoverflow)
IT (1) IT979178B (enrdf_load_stackoverflow)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5112779A (en) * 1974-07-23 1976-01-31 Tokyo Shibaura Electric Co Handotaisochito sonoseizohoho
JPS52146578A (en) * 1976-05-28 1977-12-06 Texas Instruments Inc Method of producing resistance element and semiconductor device having same element
JPS54136279A (en) * 1978-04-14 1979-10-23 Nec Corp Semiconductor device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1547292A (fr) * 1966-12-19 1968-11-22 Gen Electric Perfectionnements aux dispositifs à semiconducteur
US3648125A (en) * 1971-02-02 1972-03-07 Fairchild Camera Instr Co Method of fabricating integrated circuits with oxidized isolation and the resulting structure
FR2098319A1 (enrdf_load_stackoverflow) * 1970-07-10 1972-03-10 Philips Nv

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3404321A (en) * 1963-01-29 1968-10-01 Nippon Electric Co Transistor body enclosing a submerged integrated resistor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1547292A (fr) * 1966-12-19 1968-11-22 Gen Electric Perfectionnements aux dispositifs à semiconducteur
FR2098319A1 (enrdf_load_stackoverflow) * 1970-07-10 1972-03-10 Philips Nv
US3648125A (en) * 1971-02-02 1972-03-07 Fairchild Camera Instr Co Method of fabricating integrated circuits with oxidized isolation and the resulting structure

Also Published As

Publication number Publication date
FR2183709B1 (enrdf_load_stackoverflow) 1976-05-28
CA985793A (en) 1976-03-16
IT979178B (it) 1974-09-30
DE2314747A1 (de) 1973-11-22
JPS5317394B2 (enrdf_load_stackoverflow) 1978-06-08
JPS4924373A (enrdf_load_stackoverflow) 1974-03-04

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Legal Events

Date Code Title Description
ST Notification of lapse