US3404321A - Transistor body enclosing a submerged integrated resistor - Google Patents

Transistor body enclosing a submerged integrated resistor Download PDF

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US3404321A
US3404321A US335896A US33589664A US3404321A US 3404321 A US3404321 A US 3404321A US 335896 A US335896 A US 335896A US 33589664 A US33589664 A US 33589664A US 3404321 A US3404321 A US 3404321A
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type layer
type
semiconductor
transistor body
body enclosing
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US335896A
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Kurosawa Toshio
Yanagawa Takayuki
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NEC Corp
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Nippon Electric Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0641—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region without components of the field effect type
    • H01L27/0647—Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. vertical bipolar transistor and bipolar lateral transistor and resistor
    • H01L27/0652—Vertical bipolar transistor in combination with diodes, or capacitors, or resistors
    • H01L27/0658—Vertical bipolar transistor in combination with resistors or capacitors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
    • G11C15/02—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using magnetic elements
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/136—Resistors

Definitions

  • This invention relates to semiconductor devices, and more particularly to composite semiconductor devices of extremely small size which are commonly known as solid circuits.
  • FIG. 1 is a sectional view of a conventional semiconductor device
  • FIGS. 2 and 3 are sectional and plan views, respectively, of a semiconductor device made in accordance with the principles of this invention.
  • FIG. 1 there is shown a sectional view of a conventional composite semiconductor device in which the numeral 1 designates a P-type semiconductor wafer.
  • the numerals 2 ,and 3 indicate N-type layers isolated from one another 'by a PN junction; numerals 4 and 6 indicate P-type layers, 5 is an N-type layer, 7 an oxide film, and 8 and 8 indicate electrodes at the surface of the semiconductor body.
  • the numerals 2, 4 and S indicate respectively a collector, 'base and emitter, which together form one transistor.
  • rllhe numeral 6 indicates a resistor Which is made simultaneously with the base layer 4 by diffusion of impurities. This resistor is in contact with the separate electrodes 8 at both ends, for connection to other circuit elements external to the semiconductor body as desired.
  • the diffused layer 6 which forms the resistor may have a ysheet resistivity of, for example, 300 ohms and is formed to have a length-to-width ratio of 10 in order to provide an overall resistance of 3,000 ohms.
  • a larger length-to-width ratio is required for producing greater 3,404,321 Patented Oct. l, 1968 resistances, and it has been found irnpracticable to provide a high resistance in a very small composite or solid semi ⁇ conductor circuit :such as that under consideration.
  • FIGS. 2 and 3 are sectional and plan views respectively of a composite semiconductor device which embodies the principles of this invention.
  • the numeral 9 designates a P-type semiconductor which is provide-d internally with an N-type layer 11 insulated therefrom by lmeans of a PN junction 10.
  • N-type layer 11 which is shown cradle shaped in cross-section in FIG. 2, a strip-shaped P-type layer 13 is formed by diffusion of P-type impurities.
  • This layer 13 is also cradle or U-shaped in cross section and is insulated from the N-type layer 11 by a ⁇ PN junction 12.
  • N-type impurities are then diffused in to form an N-type layer 15 in such a manner as to cover the entire surface of the P-type layer 13, except the ends 16 thereof, and to cover portions of the PN junction 12 that may be exposed to the surface.
  • the P-type layer 13 is insulated from the N-type layers 11 and 15 by means of the PN junctions 12 and 14, respectively, and, as a whole, a very thin strip-like layer 13 is obtained which is covered with N-type layers except the ends 16 which are exposed to the surface of the semiconductor. This surface is covered with an oxide layer 18, which is formed during diffusion.
  • the impurity concentration of the N-type layer 11 is 1016 cm3
  • the P-type layer 13 has a surface concentration of 1 1019 cm.-3 with an impurity distribution of the complementary error function, and that the PN junctions 12 and 14 are located at depths 3h and 2p., respectively from the surface
  • the sheet resistivity of the P-type layer 13 will be approximately 4000 ohms.
  • the concentration of the N-type layer 11 is 1017 ern-3 while the other conditions remain unchanged, the above value of 4000 ohms will be decreased to approximately 2000 ohms.
  • the resistance in the ⁇ former case will be 4000 times l0, or 40,000 ohms, and in the latter case, 2000 times 10, or 20,000 ohms.
  • these values are far greater than can be obtained by conventional devices of comparable size.
  • the exposed portions 16 on both ends of the layer 13 maybe connecte-d to other circuit elements through suitable ohmic contacts 17.
  • the parasitic capacitance is :distributed along the PN junctions 12 rand 14, which surround the P-type layer 13, this parasitic capacitance being proportional to the overall area of these junctions. In the embodiment described, however, the device can be made so small that the resulting capacity maybe disregarded as insignificant. IIt is also possible to usefully employ this capacitance by selecting a suitable length-to-width ratio for the strip-shaped P-type layer 13. Moreover, where the solid circuit inclu-des a transistor, the diifusion of the P-type layer 13 and the N- type layer 15 may be carried out simultaneously with the diffusion of the base and emitter layers of the transistor. It will also be appreciated that the P and N-type layers may be interchanged in producing a composite semiconductor device in accordance with the teachings above.
  • a semiconductor structure for providing a high value resistance in a semiconductor integrated circuit also including a transistor comprising: on a common substrate, two separated three-region semiconductor structure portions, a tirst structure portion including lirst, second and third regions Iand a second structure portion including fourth, fth and sixth regions of which said first and fourth regions, saidsecond land fth regions and said third and sixth regions are respectively of material having the same semiconductivity type and impurity concentration gradient, al1 of said regions having a surface in a common plane, said second and fifth regions having an impurity concentration that decreases with increasing distance from said surface; said second region having contacts at the extremities thereof to define a high resistance path therethrough, said trst and third regions being free of 4 v contacts and surrounding said second region at all but the extremities thereof; said fourth, fth and sixth regions each having contacts thereon to provide the functions of a bipolar transistor.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Near-Field Transmission Systems (AREA)
  • Semiconductor Integrated Circuits (AREA)

Description

Oct l, 1968 Tosi-no .KuRosAwA ET AI. 3,404,321
TRANSISTOR BODY ENCLOSING A SUBMERGED INTEGRATED RESISTOR Filed Jan. 6, 1964 T1 al- P10/09,407 V4? 55,6 7
United States Patent O 3,404,321 TRANSISTOR BODY ENCLOSING A SUBMERGED INTEGRATED RESISTOR Toshio Kurosawa, Hiroshi Shiba, Ichiemon Sasaki, and
Takayuki Yanagawa, Tokyo, Japan, assignors to Nippon Electric Company Limited, Tokyo, Japan, a corporation of Japan Filed Jan. 6, 1964, Ser. No. 335,896 Claims priority, application Japan, Jan. 29, 1963, 38/3,978 1 Claim. (Cl. 317-235) ABSTRACT OF THE DISCLOSURE A semiconductor structure is described wherein a resistive element is located deeply within the body of the semiconductive material whereby it is provided with a relatively high resistivity. The resistive element is combined with a Ytransistor to form a unique integrated structure.
This invention relates to semiconductor devices, and more particularly to composite semiconductor devices of extremely small size which are commonly known as solid circuits.
In the manufacture of such composite semiconductor devices, it is customary to first form isolated layers in a semiconductor wafer lby 4diffusion of impurities after which transistors, diodes, resistors and capacitors, or selected ones of these, are then also provided inside the wafer. These circuit elements are then suita'bly interconnected to produce a desired circuit configuration. =In these prior art devices the resistors are usually fonmed simultaneously with the base layers of the transistors during the impurity diffusion step. Due to the extremely small size of these devices, however, the resistance value which can be obtained in a given size device is severely limited.
Accordingly, it is an object of this invention to make available a composite semiconductor device having a resistor element therein, in which it is possible to provide resistance values substantially larger than can :be achieved with conventional devices of similar size.
All of the objects, features and advantages of this invention and the manner of attaining them will become more apparent and the invention itself will be best understood -by reference to the following description of an embodiment of the invention taken in conjunction with the accompanying drawing, in which- FIG. 1 is a sectional view of a conventional semiconductor device, and
lFIGS. 2 and 3 are sectional and plan views, respectively, of a semiconductor device made in accordance with the principles of this invention.
Referring now to FIG. 1, there is shown a sectional view of a conventional composite semiconductor device in which the numeral 1 designates a P-type semiconductor wafer. The numerals 2 ,and 3 indicate N-type layers isolated from one another 'by a PN junction; numerals 4 and 6 indicate P-type layers, 5 is an N-type layer, 7 an oxide film, and 8 and 8 indicate electrodes at the surface of the semiconductor body. The numerals 2, 4 and S indicate respectively a collector, 'base and emitter, which together form one transistor. rllhe numeral 6 indicates a resistor Which is made simultaneously with the base layer 4 by diffusion of impurities. This resistor is in contact with the separate electrodes 8 at both ends, for connection to other circuit elements external to the semiconductor body as desired. The diffused layer 6 which forms the resistor may have a ysheet resistivity of, for example, 300 ohms and is formed to have a length-to-width ratio of 10 in order to provide an overall resistance of 3,000 ohms. A larger length-to-width ratio is required for producing greater 3,404,321 Patented Oct. l, 1968 resistances, and it has been found irnpracticable to provide a high resistance in a very small composite or solid semi` conductor circuit :such as that under consideration.
The invention overcomes this difficulty by providing a means for producing resistors of very high resistance as a part of an extremely small solid semiconductor assembly. FIGS. 2 and 3 are sectional and plan views respectively of a composite semiconductor device which embodies the principles of this invention. In these figures, the numeral 9 designates a P-type semiconductor which is provide-d internally with an N-type layer 11 insulated therefrom by lmeans of a PN junction 10. Inside the N-type layer 11, which is shown cradle shaped in cross-section in FIG. 2, a strip-shaped P-type layer 13 is formed by diffusion of P-type impurities. This layer 13 is also cradle or U-shaped in cross section and is insulated from the N-type layer 11 by a `PN junction 12. N-type impurities are then diffused in to form an N-type layer 15 in such a manner as to cover the entire surface of the P-type layer 13, except the ends 16 thereof, and to cover portions of the PN junction 12 that may be exposed to the surface. Thus the P-type layer 13 is insulated from the N-type layers 11 and 15 by means of the PN junctions 12 and 14, respectively, and, as a whole, a very thin strip-like layer 13 is obtained which is covered with N-type layers except the ends 16 which are exposed to the surface of the semiconductor. This surface is covered with an oxide layer 18, which is formed during diffusion.
Now assuming that the impurity concentration of the N-type layer 11 is 1016 cm3, the P-type layer 13 has a surface concentration of 1 1019 cm.-3 with an impurity distribution of the complementary error function, and that the PN junctions 12 and 14 are located at depths 3h and 2p., respectively from the surface, then the sheet resistivity of the P-type layer 13 will be approximately 4000 ohms. Then, if the concentration of the N-type layer 11 is 1017 ern-3 while the other conditions remain unchanged, the above value of 4000 ohms will be decreased to approximately 2000 ohms. It follows therefore that if the lengthto-width ratio of the strip-like layer 13 has a value of 10, the resistance in the `former case will be 4000 times l0, or 40,000 ohms, and in the latter case, 2000 times 10, or 20,000 ohms. As those knowledgeable in the art are aware, these values are far greater than can be obtained by conventional devices of comparable size. Thus, in accordance with the invention, it is possible to obtain a relatively high resistance in an extremely small area. The exposed portions 16 on both ends of the layer 13 maybe connecte-d to other circuit elements through suitable ohmic contacts 17. The parasitic capacitance is :distributed along the PN junctions 12 rand 14, which surround the P-type layer 13, this parasitic capacitance being proportional to the overall area of these junctions. In the embodiment described, however, the device can be made so small that the resulting capacity maybe disregarded as insignificant. IIt is also possible to usefully employ this capacitance by selecting a suitable length-to-width ratio for the strip-shaped P-type layer 13. Moreover, where the solid circuit inclu-des a transistor, the diifusion of the P-type layer 13 and the N- type layer 15 may be carried out simultaneously with the diffusion of the base and emitter layers of the transistor. It will also be appreciated that the P and N-type layers may be interchanged in producing a composite semiconductor device in accordance with the teachings above.
While the Iforegoing description sets forth the principles of the invention in connection with specific apparatus, it is to be understood that the -description is made only by way of example and not as a limitation of the scope of the invention as set forth in the objects thereof and in the accompanying claim.
What is claimed s:
1. A semiconductor structure for providing a high value resistance in a semiconductor integrated circuit also including a transistor comprising: on a common substrate, two separated three-region semiconductor structure portions, a tirst structure portion including lirst, second and third regions Iand a second structure portion including fourth, fth and sixth regions of which said first and fourth regions, saidsecond land fth regions and said third and sixth regions are respectively of material having the same semiconductivity type and impurity concentration gradient, al1 of said regions having a surface in a common plane, said second and fifth regions having an impurity concentration that decreases with increasing distance from said surface; said second region having contacts at the extremities thereof to define a high resistance path therethrough, said trst and third regions being free of 4 v contacts and surrounding said second region at all but the extremities thereof; said fourth, fth and sixth regions each having contacts thereon to provide the functions of a bipolar transistor.
References Cited UNITED STATES PATENTS 2,954,486 9/ 1960 Doucette et al. 317-235 2,985,804 5/1961 Bue v 317--234 3,173,101 3/1965 Stelmak 317-234 3,183,128 5/1965 Lelstiko et al. 317--234 JOHN W. HUCKERT, Primary Examiner.
I. D. CRAIG, Assistant Examiner.
US335896A 1963-01-29 1964-01-06 Transistor body enclosing a submerged integrated resistor Expired - Lifetime US3404321A (en)

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Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3465213A (en) * 1966-06-20 1969-09-02 Frances B Hugle Self-compensating structure for limiting base drive current in transistors
US3474308A (en) * 1966-12-13 1969-10-21 Texas Instruments Inc Monolithic circuits having matched complementary transistors,sub-epitaxial and surface resistors,and n and p channel field effect transistors
US3509446A (en) * 1968-05-31 1970-04-28 Gen Electric Full-wave rectifying monolithic integrated circuit
US3525025A (en) * 1965-08-02 1970-08-18 Texas Instruments Inc Electrically isolated semiconductor devices in integrated circuits
US3562547A (en) * 1967-04-17 1971-02-09 Ibm Protection diode for integrated circuit
US3629667A (en) * 1969-03-14 1971-12-21 Ibm Semiconductor resistor with uniforms current distribution at its contact surface
US3761786A (en) * 1970-09-07 1973-09-25 Hitachi Ltd Semiconductor device having resistors constituted by an epitaxial layer
JPS4924373A (en) * 1972-05-11 1974-03-04
US3852802A (en) * 1972-05-01 1974-12-03 Signetics Corp Integrated circuit hall effect device and method
JPS5036471U (en) * 1973-07-30 1975-04-17
JPS5096187A (en) * 1973-12-24 1975-07-31
US4033787A (en) * 1975-10-06 1977-07-05 Honeywell Inc. Fabrication of semiconductor devices utilizing ion implantation
DE2854901A1 (en) * 1977-12-19 1979-07-12 Nippon Electric Co CONSTANT VOLTAGE GENERATOR FOR GENERATING A CONSTANT VOLTAGE WITH A SPECIFIED TEMPERATURE COEFFICIENT
US4316319A (en) * 1977-10-25 1982-02-23 International Business Machines Corporation Method for making a high sheet resistance structure for high density integrated circuits
US4595944A (en) * 1983-12-29 1986-06-17 International Business Machines Corporation Resistor structure for transistor having polysilicon base contacts

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4805146A (en) * 1986-04-28 1989-02-14 Quadri Corporation Soft write apparatus and method for nondestructive readout core memory

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2954486A (en) * 1957-12-03 1960-09-27 Bell Telephone Labor Inc Semiconductor resistance element
US2985804A (en) * 1960-02-08 1961-05-23 Pacific Semiconductors Inc Compound transistor
US3173101A (en) * 1961-02-15 1965-03-09 Westinghouse Electric Corp Monolithic two stage unipolar-bipolar semiconductor amplifier device
US3183128A (en) * 1962-06-11 1965-05-11 Fairchild Camera Instr Co Method of making field-effect transistors

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2768367A (en) * 1954-12-30 1956-10-23 Rca Corp Magnetic memory and magnetic switch systems

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2954486A (en) * 1957-12-03 1960-09-27 Bell Telephone Labor Inc Semiconductor resistance element
US2985804A (en) * 1960-02-08 1961-05-23 Pacific Semiconductors Inc Compound transistor
US3173101A (en) * 1961-02-15 1965-03-09 Westinghouse Electric Corp Monolithic two stage unipolar-bipolar semiconductor amplifier device
US3183128A (en) * 1962-06-11 1965-05-11 Fairchild Camera Instr Co Method of making field-effect transistors

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3525025A (en) * 1965-08-02 1970-08-18 Texas Instruments Inc Electrically isolated semiconductor devices in integrated circuits
US3465213A (en) * 1966-06-20 1969-09-02 Frances B Hugle Self-compensating structure for limiting base drive current in transistors
US3474308A (en) * 1966-12-13 1969-10-21 Texas Instruments Inc Monolithic circuits having matched complementary transistors,sub-epitaxial and surface resistors,and n and p channel field effect transistors
US3562547A (en) * 1967-04-17 1971-02-09 Ibm Protection diode for integrated circuit
US3509446A (en) * 1968-05-31 1970-04-28 Gen Electric Full-wave rectifying monolithic integrated circuit
US3629667A (en) * 1969-03-14 1971-12-21 Ibm Semiconductor resistor with uniforms current distribution at its contact surface
US3761786A (en) * 1970-09-07 1973-09-25 Hitachi Ltd Semiconductor device having resistors constituted by an epitaxial layer
US3852802A (en) * 1972-05-01 1974-12-03 Signetics Corp Integrated circuit hall effect device and method
JPS4924373A (en) * 1972-05-11 1974-03-04
JPS5317394B2 (en) * 1972-05-11 1978-06-08
JPS5036471U (en) * 1973-07-30 1975-04-17
JPS5096187A (en) * 1973-12-24 1975-07-31
US4033787A (en) * 1975-10-06 1977-07-05 Honeywell Inc. Fabrication of semiconductor devices utilizing ion implantation
US4316319A (en) * 1977-10-25 1982-02-23 International Business Machines Corporation Method for making a high sheet resistance structure for high density integrated circuits
DE2854901A1 (en) * 1977-12-19 1979-07-12 Nippon Electric Co CONSTANT VOLTAGE GENERATOR FOR GENERATING A CONSTANT VOLTAGE WITH A SPECIFIED TEMPERATURE COEFFICIENT
US4595944A (en) * 1983-12-29 1986-06-17 International Business Machines Corporation Resistor structure for transistor having polysilicon base contacts

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