FR2027429B1 - - Google Patents

Info

Publication number
FR2027429B1
FR2027429B1 FR696944145A FR6944145A FR2027429B1 FR 2027429 B1 FR2027429 B1 FR 2027429B1 FR 696944145 A FR696944145 A FR 696944145A FR 6944145 A FR6944145 A FR 6944145A FR 2027429 B1 FR2027429 B1 FR 2027429B1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR696944145A
Other languages
French (fr)
Other versions
FR2027429A1 (https=
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of FR2027429A1 publication Critical patent/FR2027429A1/fr
Application granted granted Critical
Publication of FR2027429B1 publication Critical patent/FR2027429B1/fr
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/69Etching of wafers, substrates or parts of devices using masks for semiconductor materials
    • H10P50/691Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/60Wet etching
    • H10P50/64Wet etching of semiconductor materials
    • H10P50/642Chemical etching
    • H10P50/644Anisotropic liquid etching
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
FR696944145A 1968-12-31 1969-12-19 Expired FR2027429B1 (https=)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US78817768A 1968-12-31 1968-12-31

Publications (2)

Publication Number Publication Date
FR2027429A1 FR2027429A1 (https=) 1970-09-25
FR2027429B1 true FR2027429B1 (https=) 1973-08-10

Family

ID=25143680

Family Applications (1)

Application Number Title Priority Date Filing Date
FR696944145A Expired FR2027429B1 (https=) 1968-12-31 1969-12-19

Country Status (4)

Country Link
DE (1) DE1965408C3 (https=)
FR (1) FR2027429B1 (https=)
GB (1) GB1288278A (https=)
NL (1) NL6918388A (https=)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3579057A (en) * 1969-08-18 1971-05-18 Rca Corp Method of making a semiconductor article and the article produced thereby
GB1439351A (en) * 1972-06-02 1976-06-16 Texas Instruments Inc Capacitor
US4238275A (en) * 1978-12-29 1980-12-09 International Business Machines Corporation Pyrocatechol-amine-water solution for the determination of defects
US4253280A (en) 1979-03-26 1981-03-03 Western Electric Company, Inc. Method of labelling directional characteristics of an article having two opposite major surfaces
US4235014A (en) 1979-03-26 1980-11-25 Western Electric Company, Inc. Apparatus for assembling a plurality of articles
JPH067594B2 (ja) * 1987-11-20 1994-01-26 富士通株式会社 半導体基板の製造方法
JPH0775244B2 (ja) * 1990-11-16 1995-08-09 信越半導体株式会社 誘電体分離基板及びその製造方法
JPH0775245B2 (ja) * 1990-11-16 1995-08-09 信越半導体株式会社 誘電体分離基板及びその製造方法
RU2220449C1 (ru) 2002-12-19 2003-12-27 Акционерное общество закрытого типа "ЛИТЭКС" Способ маркирования изделий с помощью набора меток и метка для маркирования

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3425879A (en) * 1965-10-24 1969-02-04 Texas Instruments Inc Method of making shaped epitaxial deposits
NL144778B (nl) * 1966-12-20 1975-01-15 Western Electric Co Werkwijze voor het vervaardigen van een halfgeleiderinrichting door anisotroop etsen alsmede aldus vervaardigde inrichting.

Also Published As

Publication number Publication date
DE1965408A1 (de) 1970-07-16
DE1965408C3 (de) 1979-01-25
FR2027429A1 (https=) 1970-09-25
GB1288278A (https=) 1972-09-06
NL6918388A (https=) 1970-07-02
DE1965408B2 (de) 1978-02-16

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