FR1139450A - Procédé d'application d'une couche de tellure sur un corps semi-conducteur en tellurure de cadmium - Google Patents

Procédé d'application d'une couche de tellure sur un corps semi-conducteur en tellurure de cadmium

Info

Publication number
FR1139450A
FR1139450A FR1139450DA FR1139450A FR 1139450 A FR1139450 A FR 1139450A FR 1139450D A FR1139450D A FR 1139450DA FR 1139450 A FR1139450 A FR 1139450A
Authority
FR
France
Prior art keywords
applying
semiconductor body
cadmium telluride
tellurium layer
telluride semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Other languages
English (en)
French (fr)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Application granted granted Critical
Publication of FR1139450A publication Critical patent/FR1139450A/fr
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/18, H10D48/04 and H10D48/07, with or without impurities, e.g. doping materials
    • H01L21/44Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
    • H01L21/441Deposition of conductive or insulating materials for electrodes
    • H01L21/445Deposition of conductive or insulating materials for electrodes from a liquid, e.g. electrolytic deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/18, H10D48/04 and H10D48/07, with or without impurities, e.g. doping materials
    • H01L21/46Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
    • H01L21/461Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/465Chemical or electrical treatment, e.g. electrolytic etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemically Coating (AREA)
FR1139450D 1954-12-04 1955-12-02 Procédé d'application d'une couche de tellure sur un corps semi-conducteur en tellurure de cadmium Expired FR1139450A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL339991X 1954-12-04

Publications (1)

Publication Number Publication Date
FR1139450A true FR1139450A (fr) 1957-07-01

Family

ID=19784661

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1139450D Expired FR1139450A (fr) 1954-12-04 1955-12-02 Procédé d'application d'une couche de tellure sur un corps semi-conducteur en tellurure de cadmium

Country Status (6)

Country Link
BE (1) BE543308A (enrdf_load_stackoverflow)
CH (1) CH339991A (enrdf_load_stackoverflow)
DE (1) DE1009312B (enrdf_load_stackoverflow)
FR (1) FR1139450A (enrdf_load_stackoverflow)
GB (1) GB787935A (enrdf_load_stackoverflow)
NL (2) NL192946A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9231134B2 (en) 2012-08-31 2016-01-05 First Solar, Inc. Photovoltaic devices
US9276157B2 (en) 2012-08-31 2016-03-01 First Solar, Inc. Methods of treating a semiconductor layer

Also Published As

Publication number Publication date
GB787935A (en) 1957-12-18
NL88297C (enrdf_load_stackoverflow)
NL192946A (enrdf_load_stackoverflow)
BE543308A (enrdf_load_stackoverflow)
CH339991A (de) 1959-07-31
DE1009312B (de) 1957-05-29

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