FI981685A0 - Kellotaajuuksien generointi - Google Patents

Kellotaajuuksien generointi

Info

Publication number
FI981685A0
FI981685A0 FI981685A FI981685A FI981685A0 FI 981685 A0 FI981685 A0 FI 981685A0 FI 981685 A FI981685 A FI 981685A FI 981685 A FI981685 A FI 981685A FI 981685 A0 FI981685 A0 FI 981685A0
Authority
FI
Finland
Prior art keywords
generation
clock frequencies
frequencies
clock
Prior art date
Application number
FI981685A
Other languages
English (en)
Swedish (sv)
Other versions
FI981685A (fi
FI105425B (fi
Inventor
Paulus Carpelan
Original Assignee
Nokia Telecommunications Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Telecommunications Oy filed Critical Nokia Telecommunications Oy
Priority to FI981685A priority Critical patent/FI105425B/fi
Publication of FI981685A0 publication Critical patent/FI981685A0/fi
Priority to PCT/FI1999/000607 priority patent/WO2000008763A1/fi
Priority to AU50417/99A priority patent/AU5041799A/en
Publication of FI981685A publication Critical patent/FI981685A/fi
Application granted granted Critical
Publication of FI105425B publication Critical patent/FI105425B/fi

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
    • H03L7/23Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers
    • H03L7/235Nested phase locked loops

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
FI981685A 1998-07-31 1998-07-31 Kellotaajuuksien generointi FI105425B (fi)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FI981685A FI105425B (fi) 1998-07-31 1998-07-31 Kellotaajuuksien generointi
PCT/FI1999/000607 WO2000008763A1 (fi) 1998-07-31 1999-07-09 Generation of clock frequencies
AU50417/99A AU5041799A (en) 1998-07-31 1999-07-09 Method for generating a clock signal and a phase lock circuit

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI981685 1998-07-31
FI981685A FI105425B (fi) 1998-07-31 1998-07-31 Kellotaajuuksien generointi

Publications (3)

Publication Number Publication Date
FI981685A0 true FI981685A0 (fi) 1998-07-31
FI981685A FI981685A (fi) 2000-02-01
FI105425B FI105425B (fi) 2000-08-15

Family

ID=8552252

Family Applications (1)

Application Number Title Priority Date Filing Date
FI981685A FI105425B (fi) 1998-07-31 1998-07-31 Kellotaajuuksien generointi

Country Status (3)

Country Link
AU (1) AU5041799A (fi)
FI (1) FI105425B (fi)
WO (1) WO2000008763A1 (fi)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103812636A (zh) * 2012-11-09 2014-05-21 江苏绿扬电子仪器集团有限公司 针对高速数据采集系统获取高质量采样时钟的装置
US9660797B2 (en) 2013-03-21 2017-05-23 Telefonaktiebolaget Lm Ericsson (Publ) Method and apparatus for implementing clock holdover
CN114679173B (zh) * 2021-10-06 2022-08-30 绍兴圆方半导体有限公司 锁相环和时钟同步系统

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FI895068A0 (fi) * 1989-10-25 1989-10-25 Telenokia Oy Frekvenssyntetisator.
DE4201415A1 (de) * 1992-01-21 1993-07-22 Telefunken Microelectron Kombiniertes funksende- und -empfangsgeraet mit einer pll-schaltung

Also Published As

Publication number Publication date
WO2000008763A1 (fi) 2000-02-17
FI981685A (fi) 2000-02-01
FI105425B (fi) 2000-08-15
AU5041799A (en) 2000-02-28

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