FI86125C - KOPPLINGSANORDNING FOER KORRIGERING AV DISTORSION AV DIGITALA SIGNALER. - Google Patents

Description

1 86125

Switching arrangement for correcting the distortion of digital signals

The invention relates to a switching arrangement for correcting the distortion of digital signals in connection with a wire-bound data transmission between a transmitter and a receiver, in which device at least one capacitive element for a transmission path is connected to the receiver.

In connection with the transmission of digital signals via cables or wires, distortions usually occur, as a result of which the pulses are distorted in such a way that their information may no longer be recoverable. The degree of distortion is determined by the lead coatings. In the case of large transmission batches with a frequency spectrum of, for example, more than 30 kHz, the transmission line acts as a low-pass filter which causes linear distortions in the transmitted signals. The degree of distortion can be detected by measurements. With a corresponding high-pass filter that can be connected to the receiver for transmission, misalignments can be compensated. The digital signal is then available in its original form. Its information remains.

It is always possible to determine the degree of distortion in connection with the installed cables. It is also always possible to connect a so-25 piva high-pass filter to the transfer distance. However, a very expensive measurement and the associated installation of an over-emission filter are always a prerequisite. A coupling thus constructed will have stability only if the characteristics of the wire remain constant over time. Its changes require new measurements and new connection work. This also applies if, for any reason, new cables or wires are laid between the transmitter and receiver.

: ·; The invention is based on the object of showing a switching arrangement by which digital signals arriving at the receiver and transmitted via the line 35 can be corrected for distortion without expensive measurements and switching work.

This task is solved in connection with a switching arrangement of the above-mentioned type according to the invention, 5 - that a capacitive element which is part of the network is connected as a capacitive element, - that a comparator detecting this output voltage - 10 binary signals as a negative output voltage, to the regulator and according to the correspondence of this control voltage is adjustable for balancing purposes.

20 This switching arrangement allows automatic correction of digital signal distortions. At the receiver, you only need to connect the network with the controllable capacitance to the transmission distance only once. The value of the capacitance is adjusted immediately by the integrator in the balancing test - i.e. the elimination of signal distortions: for the purpose of obtaining its information from the comparator, · which continuously detects the output voltage of the network. The output signal of the comparator, which is continuously in the binary memory, is applied to the integrator at the edge of the cycle derived from the data stream 30 to be monitored, corresponding to the cycles. , which changes its control voltage and thus the value of the capacitance in the network as long as the average number of the two different binary memory information is the same. Interference quantities such as ko-35 do not distort this statistical average.

* 3 86125

An application example of the subject of the invention is shown in the drawings.

In the drawings, Fig. 1 schematically shows a transmission distance for digital data 5, Fig. 2 in the simplest embodiment a switching system according to the invention as a block diagram, Fig. 3 a switching arrangement supplemented with respect to Fig. 2.

Reference numeral 1 denotes a transmitter for digital signals which is connected to a receiver 3 by a wire 2 provided with a metallic conductor. At least one regenerator 4 may be connected along the transmission path.

For purposes of the invention, a "receiver" is a receiver at a transmission distance. But it can also be formed from the receiving side of the regenerator. The invention can be used for a different type of code according to a corresponding adaptation. The "fitting" then depends on the type of synchronization page derivation for switching through the binary memory, which will be described more later.

The switching arrangement according to Fig. 2 is installed in the receiver 3 marked with a dashed line. A network 5 is connected to the receiver 3 in the transmission distance if the capacitance 6 to be controlled is primarily a capacitance diode.

..I: ‘The data coming through line 2 is passed on to the amplitude solver 7 after passing through the network 5: and eaten::; from there for further processing.

A comparator 8 is connected to the output of the network 5, in which case it is an operational amplifier. The comparator 8 detects the output voltage of the network 5. A binary memory 9 is connected to the comparator 8, the output of which is connected to the integrator 10. For example, a D-flip-flop can be used as the binary memory 35 9. The integrator 10 4 86125 is connected to the network 5. The integrator 10 consists, for example, of an operational amplifier 15, to which a capacitor 16 and a resistor 17 are connected.

The switching arrangement according to Figure 2 serves as an example as follows:

In network 5, the voltage flow corresponding to the logical level of the incoming signals is measured. The voltage at the output of the network 5 is detected by a comparator 8, which determines whether the output voltage is positive or negative. The value "1" of the binary 10 code has a positive output voltage, while with a theoretically correct and undistorted signal sequence, the value "0" should not have any output voltage in the network 5.

However, in the case of a distorted binary data stream 15, there is also a positive output voltage in the network 5 in connection with the value "0", which the comparator 8 detects and passes on to the input of the memory 9. The binary memory 9 provides a positive output voltage. this output signal of the memory 9 is integrated by the integrator 10 over a certain time interval.The integrator 10 then adjusts its control voltage controlling the capacitance 6 in the sense that the output voltage of the network 5 goes towards "zero at certain times, namely periodically at the following sensing points". ". In connection with this event / -, the output voltage of the network 5 becomes negative,:: Vt comparator 8 provides correspondingly changed information:;; to the input of the memory 9, which then periodically supplies the value" 0 "to the integr The data stream through line 2 is distorted if the number of signals I. / "1" and "0" in the memory 9 remains averaged.

The time for switching memory 9 is derived from • · V *; controlled data flow. The current probing targets are followed periodically. For example, they have a distance of 1 mil- * 5 86125 seconds. For sensing points, for example, a 1-0 sequence is searched in the data stream and the leading edge of the value "1" is used to determine the cycle by which the memory 9 is switched. The sensing is performed in each case at the time when the value "0" of the 1-0 sequence appears, if a zero state of the signal is expected in connection with an undistorted signal. Conveniently, the probing time is designed to be in the center of the "0" pulse.

In connection with the periodically repeated probing-10 time thus found, the memory 9 is switched on in each case. A signal for this is applied to its input via connection 11. As long as the time of probing is a positive voltage at the output of the network 5, the memory 9 - as already mentioned - only supplies the signal "1". By adjusting the capacitance 6 of the Kapa-15, the voltage at the probing time in the network 5 is calculated until there is theoretically no voltage at the probing time. But this is not practically achievable, but at that time, after some time, a negative output-20 voltage is adjusted in the network 5, which leads to the signals "0" of the memory 9. The voltage of the network 5 is then raised again by means of the integrator 10. In this way, the balance between the signals "1" and "0" of the memory 9 is quickly adjusted. The data flow is then freed from distortion.

The integrator 10 is preferably set via the input 12 to a nominal voltage corresponding to half the logic level of the signals of the monitored data stream.

According to Fig. 3, a support amplifier 13 can be connected to the network 5. In addition, it is also possible to connect an amplifier 14 before connecting the comparator 8. Both amplifiers 13 and 14 can be adjustable. It is possible to ··· install both amplifiers 13 and 14 or just one of these. Amplifier 14 is preferably configured to be adjustable.

The switching arrangement for removing distortions from the digital signals can in principle be connected at the receiver to an arbitrary point in the transmission distance 2. It only needs to be before the amplitude solver 7, where the further transmitted signals are digitized.

• · 1

Claims (7)

1. Switching device for adaptive correction of distortion of digital signals in wired data transmission, in which switching device has at least one capacitive element coupled to the transmission distance, characterized in that - as a capacitive element there is coupled an adjustable capacitance (6), which is a part of a network (5), 10. to the output of the network (5) is connected its output voltage sensing comparator (8), which in connection with a positive output voltage of the network (5) emits an output signal other than where the output voltage is negative, - To the comparator (8), a binary memory (9) is connected, which for receiving the output signal of the comparator (8) is transmitted to the edge of a data stream received via the transmission line (2) into the receiver (3). signal sequence periodically derived cycle, - the output of the memory (9) is connected to an integrator (10) which supplies a control voltage, and - the The adjustable capacitance (6) is connected to the integrator (8) and adjustable according to this control voltage for the purpose of compensation. 2. A coupling device according to claim 1, characterized in that the cycle edge for the periodic throughput of the memory (9) is derived from the sequence 1-0 of the data stream. Connection device according to claim 1 or 2, characterized in that the nominal voltage of the integrator (10) is equal to half the logic level of the signals. 4. A coupling device according to any of claims t: 1-3, characterized in that it is adjustable; capacitance (6) uses a capacitance diode. 35 86ο 8612 5 5. A coupling device according to any one of claims 1-4, characterized in that a D-flip-flop is used as binary memory (9). Coupling device according to any of claims 5 to 5, characterized in that an operating amplifier is used as comparator (8). 7. A coupling device according to any one of claims 1-6, characterized in that an amplifier (14), preferably an adjustable amplifier, is connected between the network (5) and the comparator (8). A te *