JP2007306289A - Disconnection detecting device and disconnection detecting method for multiplex communication bus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a device and method for detecting a communication bus disconnection which solve the problem that although a method of detecting a current flowing to a communication bus has been historically employed as a communication bus disconnection detecting method, a current measuring element needs to be added to the communication bus and then influence on transmission characteristics, loss of signal power, etc., are caused. <P>SOLUTION: Disclosed is the device for detecting a disconnection of the multiple communication bus where a plurality of communication nodes are connected to a communication bus of two-line constitution. A mean voltage between the two lines constituting the communication bus is found from the middle point of two resistors connected in series and a voltage variation detecting circuit 3 monitors variation in mean voltage exceeding by a prescribed value from an offset voltage as a center, thereby detecting whether the communication bus is disconnected. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an apparatus and a method for detecting a disconnection in a multiplex communication bus that has a plurality of communication nodes and exchanges data between the plurality of communication nodes.

  As a method for detecting disconnection of a multiplex communication bus having a plurality of communication nodes, a method for detecting an abnormality in power supply of a controlled device that is a load connected to the communication bus, although not directly, is described in “Patent Document 1”. In claim 3 and FIG. According to this “Patent Document 1”, a current detection element is inserted in series in power supply lines on both the high potential side and the low potential side of a controlled device serving as a load. That is, in this configuration, the current value on the inflow side and the current value on the outflow side with respect to the load are compared by the comparison circuit, and it is determined based on the comparison result whether the power supply to the load is cut off or the supply is continued.

The disconnection detection method described in “Patent Document 1” detects a disconnection of a power supply system to a load including a power supply line, but can also be applied to an abnormality detection of a communication bus. According to this method, in order to monitor the current value flowing through the load, circuit elements such as resistors for current detection are inserted in series on the high potential side and the low potential side of the power supply line, respectively. The potential difference between both ends is compared. When this configuration is applied to a multiple communication system using a two-line communication bus with a load as a plurality of controlled devices as communication nodes, the line impedance of the communication bus changes due to the circuit elements inserted in series. Therefore, there is a problem that the loss of signal power increases, adversely affects the transmission signal waveform, and the communication quality deteriorates due to the waveform distortion caused thereby. Furthermore, it has been impossible to identify the disconnection location by this method.
JP-A-9-222080

  As described above, in the conventionally known method, circuit elements are inserted in series with the communication bus, and there are problems such as line impedance changes, waveform distortion, and increased signal power loss. . An object of the present invention is to provide a method capable of detecting the disconnection of a communication bus in which the influence of such line impedance is reduced and the waveform distortion and the loss of signal power are suppressed to a level that can be ignored.

  In order to achieve the above object, the present invention has the following configuration as a basic configuration. That is, in a communication bus having a two-line configuration in which a plurality of communication nodes are connected, an average voltage detection for detecting an average voltage between the two communication buses on the input side connected to the communication bus of each communication node The circuit includes a voltage fluctuation detection circuit that detects a disconnection of the communication bus by monitoring that the average voltage detected thereby varies more than a predetermined voltage value.

  In the above configuration, when either one of the communication buses is disconnected, the output voltage of the average voltage detection circuit varies, and when the variation is equal to or higher than a predetermined value, it is determined that the communication bus is disconnected. .

  According to the present invention, the disconnection state of the communication bus is changed from the detection by current measurement to the detection method by voltage measurement, so that the influence on the line impedance is suppressed to a negligible level, and further, each of the two communication buses is connected in series. The current value is detected from the potential difference between both ends of the inserted circuit element, and a circuit for comparing them is not required, so that loss of signal power can be suppressed and the circuit can be simplified.

Hereinafter, the details of the present invention will be described with reference to the drawings.
(Embodiment 1)
FIG. 1 shows a basic configuration of a multiplex communication bus disconnection detection apparatus according to the present invention, and FIG. 2 shows a configuration of a disconnection detection circuit 11 used in the multiplex communication bus disconnection detection apparatus.
The multiplex communication bus is composed of two lines of a communication bus H9 and a communication bus L10 (in the following description, the multiplex communication bus is abbreviated as a communication bus), and a plurality of communication nodes (hereinafter referred to as “communication buses”). Node A5, node B6, node C7, and node D8 are connected to each other. In the following description, all nodes have a transmission / reception circuit 4 and a disconnection detection circuit 11 for performing data transmission / reception communication with any other node through communication buses H9 and L10 as shown in FIG. The disconnection detection circuit 11 includes an average voltage detection circuit 1 and a voltage fluctuation detection circuit 3 as shown in FIG.

  As shown in FIG. 2, the average voltage detection circuit 1 detects an average voltage between the communication bus L10 and the communication bus H9, and is composed of two resistors H23 and a resistor L24 connected in series. Both ends of the resistor are connected to the communication bus L10 and the communication bus H9, respectively, and the average voltage of both the communication buses H9 and L10 is output from the point M, which is the connection portion of the resistor H23 and the resistor L24. Yes.

FIGS. 3 to 5 are waveform diagrams for explaining the disconnection detection operation. As shown in FIG. 1, the case where each node from the node A5 to the node C7 is in the reception state and the node D8 is in the transmission state will be described as an example. To do.
FIG. 3 shows an output waveform at the point A of the average voltage detection circuit 1 when the two communication buses H9 and L10 are both normal. That is, the waveform 12 on the communication bus H9 side and the waveform 13 on the communication bus L10 side are logical levels by raising and lowering the voltages on both communication buses with reference to a predetermined offset voltage 17 with respect to the ground level GND18. “1” and “0” are transmitted.

  If both communication buses are in the normal state, as shown in FIG. 3, the average voltage for both communication buses of the communication bus H9 side waveform 12 and the communication bus L10 side waveform 13, that is, the normal point output of the A point of the average voltage detection circuit 1 is normal. The hourly bus average voltage 19 is the same voltage as the offset voltage 17. Therefore, if the two communication buses are normal, the potential difference 14 between the communication bus average voltage 19 and the offset voltage 17 is zero. In the waveform diagrams in FIG. 3 and subsequent figures, the horizontal axis is the time axis, and the data of bit1, bit2, and bit3 are logical “1”, “0”, and “1”, respectively. Here, the offset voltage 17 is set by applying a predetermined voltage via a resistor at the input / output portion connected to the communication bus of the transmission / reception circuit 4 at each node.

  Next, a case where a disconnection has occurred in either communication bus will be described. FIG. 4 shows the output voltage of the average voltage detection circuit 1 at the node A5 when the disconnection occurs at the position of the Y portion 16 on the communication bus L10 in FIG. 1, that is, the waveform at the point M as the average voltage 20 when the communication bus L is disconnected. Show. In the waveform diagram of the two communication buses at the normal time shown in FIG. 3 because the disconnection occurs in the Y portion 16 of the communication bus L10, the level change on the communication bus L10 side does not occur, and the input on the communication bus L10 side in the node A5 The voltage remains constant while being fixed at the offset voltage 17. Therefore, in the case of the disconnection in the Y portion 16 of the communication bus L10, when the data is logic “1”, the waveform 13 on the communication bus L10 becomes a constant value as shown by the solid line in FIG. 4, and the waveform on the communication bus H9. As shown by a dotted line 12 in FIG. 4, a level shift of the voltage value corresponding to the logical value “1” occurs.

  FIG. 5 shows an output waveform at the point A of the average voltage detection circuit 1 at the node A5 when a disconnection occurs at the position of the X portion 15 on the communication bus H9 in FIG. In this case, there is no level change like the waveform 12 on the communication bus H9 side shown in the normal waveform diagram of FIG. 3, and it remains constant at the offset voltage 17, and the waveform 13 on the communication bus L10 is a logic level. Since the waveform corresponding to the value is output, the output waveform at the point M in the average voltage detection circuit 1 becomes the voltage change indicated by the average voltage 21 when the communication bus H is disconnected, and the normal communication bus average value indicated by the broken line A voltage change occurs as a shift of.

  The waveform as it is is inconvenient for disconnection determination because the information for disconnection determination of the communication bus is intermittent, and the output of the average voltage detection circuit 1 regardless of the presence or absence of data, that is, the logical value “1” or “0”. It is necessary to be able to detect that the voltage has changed due to disconnection. For this reason, by passing the low-pass filter (LPF) 26 having a sufficiently low cut-off frequency compared to the data rate, that is, a sufficiently large time constant, with respect to the data voltage change for each one side, this is indicated by a broken line in FIG. The smoothed communication bus H average voltage 22 when the communication bus H9 is disconnected is obtained. That is, since the smoothed communication bus average voltage 22 becomes a signal only on the communication bus L10 side due to the disconnection in the X section 15 on the communication bus H9, the voltage on the communication bus L10 side is the same as that in the normal state of FIG. Level shift to generate a potential difference 14 with respect to the offset voltage 17. This is the same when the communication bus L10 is disconnected. In this case, only the signal on the H9 side is obtained, and smoothing processing by the LPF 26 is performed on this signal.

  The potential difference 14 is obtained by digitizing the output voltage of the LPF 26 by an analog / digital converter (ADC) 27 and calculating a difference from an offset voltage which is a known value in the disconnection information holding circuit 28. That is, the disconnection information holding circuit 28 determines whether or not the voltage level shift is greater than or equal to a predetermined value, determines the presence or absence of disconnection, and stores the determination result. FIG. 7 illustrates a situation where the disconnection information holding circuit 28 performs this disconnection determination. Both communication buses are within a preset voltage width ± ΔV centered on a voltage corresponding to the offset voltage 17. If it is normal and is on the VCC (high potential side of the power supply voltage) side outside this range, it is determined that the communication bus L10 is disconnected, and if it is on the ground GND (low potential side) side, the communication bus H9 is disconnected. Judge that

In this way, when a disconnection occurs on either side of the two communication buses, a voltage level shift from the normal offset voltage 17 occurs. Therefore, the average voltage detection circuit 1 shown in FIG. 1 is installed at the input section of each of the nodes A5 to D8, and the average voltage detection circuit 1 monitors the communication bus average voltage between the communication bus H9 and the communication bus L10. The voltage fluctuation detection circuit 3 detects whether or not a voltage shift of a predetermined value ± ΔV or more has occurred from the communication bus average voltage when the communication bus average voltage is normal, that is, the offset voltage 17, so that the communication bus H9 is detected. Alternatively, disconnection detection of L10 can be performed.
As described above, by using the detection method by voltage measurement of the disconnection status of the communication bus, an impedance (resistance) element for current measurement is not required as compared with the conventional current measurement method, and the device for the communication bus or each node is used. It has become possible to easily detect disconnection without causing a burden.

(Embodiment 2)
FIG. 8 shows a configuration of the second embodiment of the present invention, in which a comparator 25 is inserted between the average voltage detection circuit 1 and the LPF 26 in FIG. The operation of this configuration will be described below with reference to FIG. The average voltage detection circuit 1 is composed of two resistors 23 (communication bus H9 side) and a resistor 24 (communication bus L10 side) connected in series as in FIG. Both ends are respectively connected to two communication buses H9 and L10, and the connection point of both resistors, that is, the M point, which is an intermediate point thereof, is used as an output terminal for average voltage detection. Here, if the resistance values of the two resistors 23 and 24 are made equal, the voltage at the point M, that is, the output voltage V _av of the average voltage detection circuit 1 is normal when both communication buses are not disconnected. 3, the average value of the voltage V _H of the communication bus _{H 9} and the voltage V _L of the communication bus L 10 at the logical value “1”, that is, the output voltage of the average voltage detection circuit 1 in the normal state is expressed as V _{As avn} , V _avn = (V _H + V _L ) / 2 ( _Equation 1)
Given in. The output voltage in the case of logic “0” is also given by the same voltage V _avn as in ( _Equation 1). The normal average voltage V _avn is equal to the offset voltage.

The output voltage V _av of the average voltage detection circuit 1 in the case of including either H or L communication bus disconnection is applied to one input terminal (+ side non-inverting input terminal in FIG. 5) of the other and the other A reference power supply 2 (V _ref ) is connected to the input terminal (inverted input terminal in FIG. 5). The comparator 25 performs an input voltage comparison with an analog quantity. Specifically, for example, an operational amplifier having a subtractor configuration can be used. Here, the voltage value of the reference power supply 2 is set equal to the communication bus average voltage when the communication bus is normal, that is, the offset voltage, and the reference power supply voltage is compared with the average voltage detection circuit 1 output voltage V _av including the time of disconnection. To do. In this state, if both communication buses are normal, the same voltage (V _avn and V _ref ) is applied to both inputs of the comparator 25, so the output of the comparator 25 is the output of the comparator 25. 1/2 of the power supply voltage VCC. That is, the output voltage V _comp of the comparator 25 is V _comp = VCC / 2 ( _Equation 2)
It becomes. That is, the value given by the equation (2) is equal to the offset voltage. As a result, the output voltage V _comp of the comparator 25 outputs a voltage lower than VCC / 2 when a disconnection occurs on the communication bus H9 side, and a voltage higher than VCC / 2 when a disconnection occurs on the communication bus L10 side. It becomes. Here, in order to determine whether or not the output of the comparator 25 has changed to a level at which it is determined that the communication bus is disconnected, the disconnection information holding circuit 28 is provided with a predetermined voltage range ΔV centered on the offset voltage. When it is out of this range, it is determined as a disconnection, and this determination result is retained.

  In the stage after the comparator 25, smoothing is performed by the low-pass filter (LPF) 26 as in the case of the first embodiment, and the disconnection information holding circuit 28 is input through the communication bus when it is normal. Only sequential monitoring of data is performed, and no particular data is held. However, as described in FIGS. 4 and 5, the output voltage of the comparator 25 is shifted from VCC / 2, which is a normal value, and is shifted to a higher potential side or a lower potential side than the voltage range ± ΔV. When a disconnection of the communication bus is detected, the presence / absence of disconnection is held at a logical value level.

When the potential difference 14 generated by changing the output voltage V _av of the average voltage detection circuit 1 is observed in this way, the average voltage signal is transmitted to the disconnection information holding circuit 28 via the LPF 26 and the ADC 27. The The disconnection information holding circuit 28 recognizes the disconnection of the communication by determining whether or not the digitized average voltage is within a predetermined range (± ΔV) with respect to the value at the normal time. Hold. The held disconnection information is reset after the disconnection of the communication bus is repaired.

  As shown in the configuration of the second embodiment, the comparator 25 is provided in the subsequent stage of the average voltage detection circuit 1, and the operational amplifier which is the comparator 25 calculates the potential difference deviating from the reference voltage with reference to the offset voltage. By amplification, the disconnection detection sensitivity can be improved.

(Embodiment 3)
FIG. 9 shows the configuration of the third embodiment according to the present invention. In the third embodiment, the voltage variation detection circuit 3 is expanded from the second embodiment, and the same elements as those in the second embodiment such as the average voltage detection circuit 1, the reference power supply 2, and the disconnection information holding circuit are used. The same reference numerals are given to them. Hereinafter, the configuration of the voltage fluctuation detection circuit 3 will be described with reference to FIG.

  In FIG. 9, the comparator section uses two comparators, comparator A29 and comparator B30, and connects the output of average voltage detection circuit 1 to the input terminals of opposite polarities of both comparators 29 and 30, so that the reference power supply 2 has a configuration in which the same reference power supply 2 is commonly connected to input terminals having opposite polarities to the respective signal inputs. In FIG. 9, in the comparator A29, the reference power supply 2 is connected to the non-inverting (+) input terminal, and the output of the average voltage detection circuit 1 is connected to the inverting (−) input terminal. Is connected to the inverting (−) input terminal and the output of the average voltage detection circuit 1 is connected to the non-inverting (+) input terminal, and the disconnection detection of the communication bus H9 is detected on the comparator 29 side. It is performed on the comparator 30 side, and these detection results are converted into logical values, and a logical sum is obtained by an OR circuit to obtain disconnection information of both communication buses.

  The outputs of the comparator 29 and the comparator 30 are smoothed and noise-removed by a low-pass filter A (LPFA) 31 and a low-pass filter B (LPFB) 32, respectively, and then the disconnection information obtained thereby is converted into a level conversion circuit A33. The level conversion circuit B34 converts the value to a logical value of “1” or “0”, respectively. For example, when the communication bus is normal, the outputs of the comparator A29 and the comparator B30 are both equal to VCC / 2 as described in FIGS. 3 and 8, and the outputs of the level conversion circuits A33 and B34 in this case are Both have the logical value “0”.

  When the communication bus H9 is disconnected, the output of the comparator A29 is higher than VCC / 2 with respect to the data “1” input. As a result, the output of the level conversion circuit A33 becomes the logical value “1”. At this time, since the output of the comparator B30 becomes a voltage lower than VCC / 2, the output of the level conversion circuit B34 remains at the logical value “0”. On the contrary, when the communication bus L10 is disconnected, the output of the comparator B30 becomes a voltage higher than VCC / 2 at the normal time, so the output of the level conversion circuit B34 becomes the logical value “1”, and the comparator A29 The output of the level conversion circuit A33 remains at a logical value “0”.

From the above, the following relationship is established between the comparator output voltage V _comp represented by the equation (2), the reference power supply voltage (V _ref = VCC / 2), and the logical value K.

When V _av > V _ref → K = “1” (Equation 3)
When V _av ≦ V _ref → K = “0” (Equation 4)
Thus, since the logical value “1” is output from either of the level conversion circuits A33 or B34 when the communication bus is disconnected, the logical value “1” is obtained by the OR operation of the OR circuit 35 even if any of the buses is disconnected. Is output, and the output disconnection information is input to the disconnection information holding circuit 28 and held as disconnection information.

  With the configuration of the second embodiment, the disconnection information can be digitized and stored without using the ADC 27, and the disconnection information can be retained with high reliability.

(Embodiment 4)
FIG. 10 shows a fourth embodiment according to the present invention. In the fourth embodiment, the disconnection information of the communication bus H9 or the communication bus L10 generated by the disconnection detection circuit 11 mounted on the device forming each node connected to the communication bus is represented by the signal lines a37, It is input to the disconnection location determination circuit 36 via b38, c39 and d40, and the disconnection location is determined from the distribution pattern of the disconnection information. The disconnection detection circuit 11 used here has the configuration described in any of FIG. 2, FIG. 8, or FIG. 9, and the operation thereof is as described in the first embodiment or the second embodiment.

表１は図８における構成で、断線箇所判定回路３６における断線箇所判定のアルゴリズムを示すものである。すなわち、信号線３７乃至４０の断線情報（○は正常、×は断線状態を示す）の組み合わせと断線箇所判定との関係を与える表で、この表１の関係を断線箇所判定回路３６に記憶させておくことで断線箇所を検出する。断線箇所判定回路３６においては、表１の関係をハードウエアとして判定回路のネットワークを組むことによる方法、あるいはテーブルルックアップ方式としてソフトウエアによる方法の何れの方法でも検出することが出来る。

Table 1 shows the algorithm for determining the disconnection location in the disconnection location determination circuit 36 with the configuration shown in FIG. In other words, this is a table that gives the relationship between the combination of the disconnection information of the signal lines 37 to 40 (◯ indicates normal, and × indicates the disconnection state) and the disconnection location determination. The disconnection point is detected. In the disconnection location determination circuit 36, the relationship shown in Table 1 can be detected by either a method using a network of determination circuits as hardware, or a method using software as a table lookup method.

  For example, as shown in FIG. 10, if transmission is performed from the node A, and the signal line a37 and the signal line b38 are normal (O), and the signal line c39 and the signal line d40 are disconnected (x), Table 1 From this relationship, the disconnection location determination result is determined that a disconnection occurs between the nodes C7 and B6. Alternatively, when the signal is transmitted from the node D8 in FIG. 8 and only the signal line a37 indicates an abnormality (×), it is determined from the relationship in Table 1 that a disconnection has occurred between the node B6 and the node A5. Etc. With this configuration, not only the presence / absence of disconnection of the communication bus can be detected, but also the disconnection position can be specified. In the above processing, it is possible to determine which of the communication buses H9 or L10 is disconnected from the magnitude relationship of the average voltage Vav with respect to the offset voltage.

1 is a basic configuration diagram of a multiplex communication bus disconnection detection apparatus according to the present invention. The basic block diagram of the disconnection detection circuit by this invention. The signal waveform figure on a communication bus when a communication bus is normal. The signal waveform figure on a communication bus when the communication bus L10 side is disconnected. The signal waveform figure on a communication bus when the communication bus H9 side is disconnected. LPF output waveform diagram when the communication bus H is disconnected. The voltage level figure for performing a disconnection determination operation | movement. FIG. 6 is a configuration diagram of a disconnection detection circuit according to a second embodiment. FIG. 6 is a configuration diagram of a disconnection detection circuit according to a third embodiment. FIG. 6 is a circuit configuration diagram for performing disconnection location determination according to the fourth embodiment.

Explanation of symbols

1: Average voltage detection circuit 2: Reference voltage 3: Voltage fluctuation detection circuit 4: Transmission / reception circuit 5: Node A 6: Node B
7: Node C 8: Node D
9: Communication bus H 10: Communication bus L
11: Disconnection detection circuit 12: Waveform on communication bus H 13: Waveform on communication bus L 14: Potential difference 17: Offset voltage 18: Ground (GND)
19: Average communication bus voltage during normal operation 20: Bus average voltage when communication bus L is disconnected 21: Bus average voltage when communication bus H is disconnected
23: Resistor H 24: Resistor L
25: Comparator 26: Comparator A
27: Comparator B 28: Disconnection information holding circuit 31: Low-pass filter A 32: Low-pass filter B
33: Level conversion circuit A 34: Level conversion circuit B
35: OR circuit

Claims (8)

An apparatus for detecting disconnection of a multiplex communication bus in which a plurality of communication nodes are connected to a communication bus constituted by two lines of a communication bus H and a communication bus L,
Each of the communication nodes has an average voltage detecting circuit for obtaining an average voltage between the two lines of the communication bus H and the communication bus L, and the average voltage is determined by comparing the average voltage with a predetermined reference voltage. A disconnection detecting device for a multiplex communication bus, comprising: a disconnection detecting circuit having a voltage fluctuation detecting circuit for detecting that the value fluctuates more than the value of. The disconnection detecting device for a multiplex communication bus according to claim 1,
The average voltage detection circuit is composed of two resistors connected in series, and both ends of the resistors connected in series are connected to the communication bus H and the communication bus L, respectively, and the two resistors The average voltage between the two communication buses is output from the intermediate point that is the connection point of
The voltage fluctuation detection circuit has a second input having the average voltage output from the average voltage detection circuit as a first input terminal and the preset reference voltage having a polarity opposite to that of the first input terminal. A comparator applied to each of the input terminals, a low-pass filter for averaging the output voltage of the comparator, an analog-to-digital converter for digitizing the output voltage of the low-pass filter,
When the output of the analog / digital converter fluctuates more than a predetermined voltage, it is determined that a disconnection has occurred in the communication bus, and has a disconnection information holding circuit for performing digital signal processing for holding the determination result as disconnection information A device for detecting disconnection of a multiplex communication bus. The disconnection detecting device for a multiplex communication bus according to claim 1,
The voltage fluctuation detection circuit has first and second comparators, each of which has two non-inverting and inverting input terminals,
The output of the average voltage detection circuit is applied to the non-inverting input terminal of the first comparator and the inverting input terminal of the second comparator, and the inverting input terminal of the first comparator and the second comparator The reference voltage is applied to the non-inverting input terminal of
The outputs of the first and second comparators are connected to first and second low-pass filters, respectively.
The outputs of the first and second low-pass filters are converted into logical values based on whether or not the outputs of the first and second comparators are more than a predetermined value with respect to the predetermined reference voltage. Are connected to the first and second level conversion circuits shown in FIG.
An OR circuit for calculating a logical sum of the outputs of the first and second level converters;
And a disconnection information holding circuit for storing the output of the OR circuit as disconnection information. The disconnection detecting device for a multiplex communication bus according to any one of claims 1 to 3,
A signal line for outputting disconnection information from the voltage fluctuation detection circuit mounted on each communication node;
A disconnection detection device for a multiplex communication bus, comprising: a disconnection location determination circuit for determining a disconnection location from a distribution of disconnection information between the signal lines. In a method for detecting disconnection of a communication bus having a two-wire configuration in which a plurality of communication nodes are connected,
A method for detecting disconnection of a communication bus, comprising: detecting an average voltage between communication buses of the two-line configuration and detecting that the average voltage has fluctuated by a predetermined value or more. . In the multiplex communication bus disconnection detection method according to claim 5,
The average voltage is detected from an intermediate connection point between two series-connected resistors connected between the two communication buses,
By comparing the average voltage with a predetermined reference voltage, the difference between these two voltages is determined, and further the time average value of the average voltage is determined by a low-pass filter,
A method for detecting disconnection of a multiplex communication bus, wherein the presence or absence of the communication bus is detected from a change in the time average value voltage, and the detection result is stored. In the multiplex communication bus disconnection detection method according to claim 5,
A disconnection of a multiplex communication bus characterized in that a voltage value of the average voltage is measured by two sets of comparators having different polarities, and the presence / absence of a disconnection is indicated by a logical value by determining a magnitude relationship with respect to the reference voltage. Detection method. In the multiplex communication bus disconnection detection method according to claim 5 or 7,
Collating the distribution state of the disconnection information detected in each of the plurality of communication nodes connected to the communication bus with a table that gives a relationship between a preset distribution pattern of the disconnection information and the disconnection location. A disconnection detection method for a multiplex communication bus, characterized in that a disconnection location is specified by

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